This paper presents initial results on developing high temperature capable SiC JFET based IC technology. All JFET devices are fully planar, formed by ion implantation, and the device design allows the use of semi-insulating or conductive substrates. Basic analog and logic ICs were built in order to demonstrate the technology high temperature capability. All circuits used enhancement mode n-channel JFETs as active transistors, and depletion mode transistors as active loads. The logic circuits built included NOT, NAND, and NOR gates. The analog circuits built included a simple one-stage operational amplifier. JFETs and ICs were packaged in ceramic DIP packages and tested at temperatures up to 350°C, which was the IC design target maximum operating temperature.