Silicon Carbide (SiC) integrated circuits processes show promise for improved performance in high temperature, high radiation, and other extreme environments. The circuits described are the first implementations of phase-locked or delay-locked loops in SiC. The PLL utilizes a common charge-pump topology including a fully integrated passive loop filter, and were designed with a target maximum operating frequency of 5 MHz. Component blocks use novel topologies to optimize performance in a SiC CMOS process. Experimental results of both the complete PLL as well as the Phase Frequency Detector and Voltage Controlled Oscillator components are presented. Operation of the PLL at frequencies up to 1.5 MHz is demonstrated through test results of unpackaged die.
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Research Article|
January 01 2014
500 kHz – 5 MHz Phase-Locked Loops in High-Temperature Silicon Carbide CMOS
Paul Shepherd;
1University of Arkansas Department of Electrical Engineering, 3217 Bell Engineering Center, Fayetteville, AR 72701
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Ashfaqur Rahman;
Ashfaqur Rahman
1University of Arkansas Department of Electrical Engineering, 3217 Bell Engineering Center, Fayetteville, AR 72701
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Shamim Ahmed;
Shamim Ahmed
1University of Arkansas Department of Electrical Engineering, 3217 Bell Engineering Center, Fayetteville, AR 72701
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A Matt Francis;
A Matt Francis
2 Ozark Integrated Circuits, 700 West Research Center Blvd, Fayetteville, AR 72701
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Jim Holmes;
Jim Holmes
2 Ozark Integrated Circuits, 700 West Research Center Blvd, Fayetteville, AR 72701
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H. Alan Mantooth
H. Alan Mantooth
1University of Arkansas Department of Electrical Engineering, 3217 Bell Engineering Center, Fayetteville, AR 72701
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Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) (2014) 2014 (HITEC): 000076–000083.
Citation
Paul Shepherd, Ashfaqur Rahman, Shamim Ahmed, A Matt Francis, Jim Holmes, H. Alan Mantooth; 500 kHz – 5 MHz Phase-Locked Loops in High-Temperature Silicon Carbide CMOS. Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 1 January 2014; 2014 (HITEC): 000076–000083. doi: https://doi.org/10.4071/HITEC-TP15
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