This presentation will provide a comprehensive landscape of the current status of 3D IC including the main trends of utilizing TSV based stacked 3DIC as well as Si interposer based 2.5D IC packages. The differentiation of the market requirements (and cost) that drives technology development and commercialization will be explained and summarized. TSV less 3DIC development options will be discussed. In addition, brief overview of the challenges of ‘transistor level stacking’ will be provided.

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