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Analog and Logic High Temperature Integrated Circuits Based on Enhancement Mode Planar SiC JFETs

Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) (2018) 2018 (HiTEC): 000079–000085.
This article has been cited by the following articles in journals that are participating in CrossRef Cited-by Linking.
  • Peter Alexandrov
  • Matt O'Grady
Materials Science Forum (2020) 1004: 1097.
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