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Volume 2013, Issue DPC

1 January 2013

ISSN 2380-4491

The Continued Adoption of ZiBond and DBI in Volume Applications

Kathy Cook

View Articletitled, The Continued Adoption of ZiBond and DBI in Volume Applications

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Multi-scale materials data for 3D TSV stack performance simulation and model validation

Ehrenfried Zschech; Kong Boon Yeap; Christoph Sander; Uwe Mühle; Valeriy Sukharev

View Articletitled, Multi-scale materials data for 3D TSV stack performance simulation and model validation

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Adopt Advanced RDL Rule to Apply Flip Chip Technology for Next Generation Si Node: Feasibility Study

Shengmin Wen; KyungRok Park; Patrick Thompson; JeongSeok Lee; HyunJin Park

View Articletitled, Adopt Advanced RDL Rule to Apply Flip Chip Technology for Next Generation Si Node: Feasibility Study

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Semeiconductor Packaging Trends and Materials Challenges

Mahadevan “Devan” Iyer

View Articletitled, Semeiconductor Packaging Trends and Materials Challenges

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Cost Drivers for 2.5D and 3D Applications

Chet Palesko; E. Jan Vardaman; Alan Palesko

View Articletitled, Cost Drivers for 2.5D and 3D Applications

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Stacked 3d package with improved bandwidth and power efficiency

Dev Gupta

View Articletitled, Stacked 3d package with improved bandwidth and power efficiency

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ChipsetT: Embedded Die Substrate Applications

Jon G. Aday; Ted Tessier; Kazuhisa Itoi; Satoshi Okude

View Articletitled, ChipsetT: Embedded Die Substrate Applications

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Lithography Process Challenges for 3D and 2.5D Applications

Doug Shelton; Tomii Kume

View Articletitled, Lithography Process Challenges for 3D and 2.5D Applications

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Reliability of die to wafer bonding using copper-tin interconnections

Arnaud Garnier; Rémi Franiatte; David Bouchu; Romain Anciant; Séverine Chéramy

View Articletitled, Reliability of die to wafer bonding using copper-tin interconnections

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Thermal modeling approach for enhancing TCNCP process for manufacturing fine pitch copper pillar flip chip packages

Siddharth Bhopte; Jesse Galloway; Kyung-Rok Park; Hyun-Jin Park; Jeong-Han Choi; Ho-Beob Yu; Sung-Hwan Yang

View Articletitled, Thermal modeling approach for enhancing TCNCP process for manufacturing fine pitch copper pillar flip chip packages

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Groove Geometry and Mold Shrinkage Effects on Die Stress in Flip Chip Molded BGAs (FCMBGA)

Bora Baloglu; Miguel Jimarez; Ahmer Syed

View Articletitled, Groove Geometry and Mold Shrinkage Effects on Die Stress in Flip Chip Molded BGAs (FCMBGA)

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Spheron Fan-In WLCSP Technology Qualification and Scale Up - 200 mm to 300 mm

Andre Cardoso; Rui Almeida; Felandorio Fernandes; Ted Tessier; Anthony Curtis

View Articletitled, Spheron Fan-In WLCSP Technology Qualification and Scale Up - 200 mm to 300 mm

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Detection and Mitigation of Electrostatic Pull-in Instability in MEMS Parallel Plate Actuators

Colin Stevens; Robert Dean

View Articletitled, Detection and Mitigation of Electrostatic Pull-in Instability in MEMS Parallel Plate Actuators

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Design, Simulation and Testing of High Density, High Current Micro-machined Embedded Capacitors

Aubrey Beal; C. Stevens; T. Baginski; M. Hamilton; R. Dean

View Articletitled, Design, Simulation and Testing of High Density, High Current Micro-machined Embedded Capacitors

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Sealing dispensing requirements to meet MEMS packaging and throughput impact

Heakyoung Park

View Articletitled, Sealing dispensing requirements to meet MEMS packaging and throughput impact

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Assembly Standardization for the Diverse Packaging Requirements of MEMS & Sensors

Russell Shumway

View Articletitled, Assembly Standardization for the Diverse Packaging Requirements of MEMS & Sensors

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Assembly Challenges for 2.5D Packages

Michael G Kelly; Marnie Mattei; Rick Reed

View Articletitled, Assembly Challenges for 2.5D Packages

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3D Integration of System-in-Package (SiP): Toward SiP-Interposer-SiP for High-End Electronics

Rabindra Das; Frank D. Egitto; Steven G. Rosser; Erich Kopp; Barry Bonitz

View Articletitled, 3D Integration of System-in-Package (SiP): Toward SiP-Interposer-SiP for High-End Electronics

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Novel Low-Loss Photodefined Electrical TSVs for Silicon Interposers

Paragkumar Thadesar; Muhannad S. Bakir

View Articletitled, Novel Low-Loss Photodefined Electrical TSVs for Silicon Interposers

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Polymer Based Interposer offering Si Matched CTE + ESD Protection

Karen Shrier

View Articletitled, Polymer Based Interposer offering Si Matched CTE + ESD Protection

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Ultra High Density Capacitors merged with Through Silicon Vias to enhance performances.

Catherine Bunel

View Articletitled, Ultra High Density Capacitors merged with Through Silicon Vias to enhance performances.

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3D Packaging- Synthetic Quartz Substrate and Interposer for High Frequency Applications

Vern Stygar; Tim Mobley; Shintarou Takahashi

View Articletitled, 3D Packaging- Synthetic Quartz Substrate and Interposer for High Frequency Applications

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Development of Plating Process for Micro Bump Formation

Takuma Katase; Koji Tatsumi; Tekeshi Hatta; Masayuki Ishikawa; Akihiro Masuda

View Articletitled, Development of Plating Process for Micro Bump Formation

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Production of Uniform Dimension Copper Pillars for Flip Chip CSP

Stephen Kenny; Kai Matejat; Carsten Schauer; Sven Lamprecht

View Articletitled, Production of Uniform Dimension Copper Pillars for Flip Chip CSP

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Semiconductor Fluxes for Wafer Bumping in 3D Assembly

Maria Durham; Laura Mauer; Andy Mackie, PhD

View Articletitled, Semiconductor Fluxes for Wafer Bumping in 3D Assembly

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Micro-tube insertion into aluminum pads: Simulation and experimental validations

Alexis Bedoin; B. Goubault de Brugière; F. Marion; F. Berger; M. Fendler; M. Volpert; H. Ribot

View Articletitled, Micro-tube insertion into aluminum pads: Simulation and experimental validations

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Lead Free Paste with under 3um Solder Particles for Fine Pitch C4 bumping and pre-coating solder applications

Hironori Uno; Masayuki Ishikawa; Akihiro Masuda; Hiroki Muraoka; Kanji Kuba

View Articletitled, Lead Free Paste with under 3um Solder Particles for Fine Pitch C4 bumping and pre-coating solder applications

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Microfluidic Technology using SU8 on top of PCBs

Stefan Gassmann; Lienhard Pagel

View Articletitled, Microfluidic Technology using SU8 on top of PCBs

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CoC (Chip on Chip) or FtoF (Face to Face) - PossumTM Technology for 3D MEMS and ASIC eliminating the need of TSV or Wire Bonding

Jemmy Sutanto, PhD; D. H. Kang; J. H. Yoon; K. S. Oh; Michael Oh; R. Lanzone; R. Huemoeller

View Articletitled, CoC (Chip on Chip) or FtoF (Face to Face) - PossumTM Technology for 3D MEMS and ASIC eliminating the need of TSV or Wire Bonding

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A design tool fully adapted to the development of the thin film packaging process used for MEMS devices

Souchon Frederic; Gervais Anne-Charlotte; Thouy Laurent; Saint-Patrice Damien; Pornin Jean louis

View Articletitled, A design tool fully adapted to the development of the thin film packaging process used for MEMS devices

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Glass Carrier Wafers for the Si Thinning Process for Stack IC Applications

Aric Shorey; Bor-Kai Wang; Joe Canale; Windsor Thomas

View Articletitled, Glass Carrier Wafers for the Si Thinning Process for Stack IC Applications

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Temporary and Permanent Adhesives for Thin Wafer Handling and Assembly

Mark Oliver; Jong-Uk Kim; Michael Gallagher; Zidong Wang; Janet Okada; Elissei Iagodkine; Kai Zoschke; Matthias Wegner; Michael Töpper

View Articletitled, Temporary and Permanent Adhesives for Thin Wafer Handling and Assembly

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Versatile Z-Axis Interconnection for High Performance Electronics

Rabindra Das; J. M. Lauffer; F.D. Egitto

View Articletitled, Versatile Z-Axis Interconnection for High Performance Electronics

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Electrografted insulator layer as copper diffusion barrier for TSV interposers

Vincent Mevellec; Dominique Suhr; Thomas Dequivre; Frédérique Raynal

View Articletitled, Electrografted insulator layer as copper diffusion barrier for TSV interposers

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Effect of Substrate Layer Variation on Package Warpage

Brendan C. Wells; Wei Lin; HyunJin Park

View Articletitled, Effect of Substrate Layer Variation on Package Warpage

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From Mechanical to Chemical Adhesion

Meng Hsieh; Ellina Libman; Lutz Brandt

View Articletitled, From Mechanical to Chemical Adhesion

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Direct Palladium-Gold on copper as a Surface Finish for next generation Packages.

Mustafa Ozkok; Sven Lamprecht; Gustavo Ramos; Arnd Kilian

View Articletitled, Direct Palladium-Gold on copper as a Surface Finish for next generation Packages.

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LEDs for SSL - Market Review and Forecast

Vrinda Bhandarkar

View Articletitled, LEDs for SSL - Market Review and Forecast

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A Solder Joint Reliability Model for the Philips Lumileds LUXEON Rebel LED Carrier Using Physics of Failure Methodology

Greg Caswell; Rudi Hechfellner; Michiel Kruger; Tewe Heemstra; Philips Lumileds; Nathan Blattau; Gregg Kittlesen; Vikrant More

View Articletitled, A Solder Joint Reliability Model for the Philips Lumileds LUXEON Rebel LED Carrier Using Physics of Failure Methodology

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Lithography for Wafer Level Packaging for LED Manufacturing

Michael Hornung

View Articletitled, Lithography for Wafer Level Packaging for LED Manufacturing

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Advanced Passive Thermal Management for LED Bulb Systems

James Petroski

View Articletitled, Advanced Passive Thermal Management for LED Bulb Systems

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Fabrication of 3D-IC Interposers

John T. Keech; Garret Piech; Scott Pollard

View Articletitled, Fabrication of 3D-IC Interposers

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Low temperature MOCVD TiN barrier deposition for high aspect ratio TSVs : A solution for 3D integration

Thierry MOURIER; Stephane Minoret; Sabrina Fadloun; Larissa Djomeni; Sylvain Maitrejean; Steve Burgess; Andy Price; Chris Jones; Anne Roule; Laurent Vandroux

View Articletitled, Low temperature MOCVD TiN barrier deposition for high aspect ratio TSVs : A solution for 3D integration

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Through Si Vias Using Liquid Metal Conductors for Re-workable 3D Electronics

George A. Hernandez; Daniel Martinez; Stephen Patenaude; Charles Ellis; Michael Palmer; Michael Hamilton

View Articletitled, Through Si Vias Using Liquid Metal Conductors for Re-workable 3D Electronics

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Strain in Electroless Copper Films: Analysis by in situ X-Ray Diffraction and Curvature Methods

Simon Bamberg; Tobias Bernhard (corresponding author); Laurence J. Gregoriades (presenting author); Frank Brüning; Ralf Brüning; Johannes Etzkorn; Wolfgang Friz; Michael Merschky; Bruce Muir; Laura K. Perry; Tanu Sharma

View Articletitled, Strain in Electroless Copper Films: Analysis by in situ X-Ray Diffraction and Curvature Methods

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The Role of Extreme Agitation in Accelerating the Removal Rate of Advanced Packaging Photoresists

Mani Sobhian

View Articletitled, The Role of Extreme Agitation in Accelerating the Removal Rate of Advanced Packaging Photoresists

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Copper, Nickel, and Lead-Free Solder Electroplating Solutions for Pillar and Micro-Pillar Capping Applications

Julia Woertink; Erik Reddington; Inho Lee; Yi Qin; Jonathan Prange; Pedro Lopez Montesinos; Jui-Ching Lin; Masaaki Imanari; Jianwei Dong; Wataru Tachikawa; Jeff Calvert

View Articletitled, Copper, Nickel, and Lead-Free Solder Electroplating Solutions for Pillar and Micro-Pillar Capping Applications

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Robust Reliability Performance of Large size eWLB (Fan-out WLP)

Seung Wook Yoon

View Articletitled, Robust Reliability Performance of Large size eWLB (Fan-out WLP)

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Reliability and Performance Improvements of 3D System-in-Packages in Fan-Out Wafer Level Packaging

Scott Hayes; Tony Gong; Doug Mitchell; Michael Vincent; Jason Wright; Yap Weng Foong

View Articletitled, Reliability and Performance Improvements of 3D System-in-Packages in Fan-Out Wafer Level Packaging

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Innovative 3D Structures Utilizing Wafer Level Fan-Out (WLFO) Technology

Curtis Zwenger; JinYoung Khim; YoonJoo Khim; SeWoong Cha; SeungJae Lee; JinHan Kim

View Articletitled, Innovative 3D Structures Utilizing Wafer Level Fan-Out (WLFO) Technology

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A New Embedded Package Structure and Technology for the Next Generation of WLP, the Wafer level Fun-Out Package - WFOP (TM)

Akio Katsumata

View Articletitled, A New Embedded Package Structure and Technology for the Next Generation of WLP, the Wafer level Fun-Out Package - WFOP (TM)

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Low Residual Stress and High Performance Dielectric for WLP (Wafer Level Packaging) Applications

Raymond Thibault; Michael Gallagher; Kevin Wang; Matthew Yonkey; Duane Romer; Xiang Qian Liu; Kim Ho; Greg Prokopowicz; Joe Lachowski; Mark Oliver; Eric Huenger; Seiji Inaoka; Scott Kisting; Lynne Mills; Sue McNamara; Rosemary Bell

View Articletitled, Low Residual Stress and High Performance Dielectric for WLP (Wafer Level Packaging) Applications

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Integration of Passive Components into 3D PoP Fan-Out Packages

Tom Strothmann

View Articletitled, Integration of Passive Components into 3D PoP Fan-Out Packages

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A Process Dependent Warpage and Stress Model for 3D Packages Considering Incoming Die/Substrate Warpage and Assembly Process Impacts

Wei Lin; Ahmer Syed; KiWook Lee; Karthikeyan Dhandapani

View Articletitled, A Process Dependent Warpage and Stress Model for 3D Packages Considering Incoming Die/Substrate Warpage and Assembly Process Impacts

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Thermal & mechanical challenges for 3DIC integration

Severine Cheramy

View Articletitled, Thermal & mechanical challenges for 3DIC integration

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Thermal Analysis of xFD DRAM Packages Through Simulation and Experimental Validation

Ron Zhang; John Tseng; Hala Shaba; Ellis Chau; Wael Zohni; Laura Mirkarimi

View Articletitled, Thermal Analysis of xFD DRAM Packages Through Simulation and Experimental Validation

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Techniques and Tools for Collaborative Thermal and Mechanical Modeling of 3D ICs

Kamal Karimanal

View Articletitled, Techniques and Tools for Collaborative Thermal and Mechanical Modeling of 3D ICs

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Development of Embedded High Power Electronics Modules for Automotive Applications

Lars Boettcher; S. Karaszkiewicz; D. Manessis; A. Ostmann

View Articletitled, Development of Embedded High Power Electronics Modules for Automotive Applications

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3D Ics with Embedded Microfluidic Cooling and High Aspect Ratio TSV Integration

Paragkumar Thadesar; Muhannad S. Bakir

View Articletitled, 3D Ics with Embedded Microfluidic Cooling and High Aspect Ratio TSV Integration

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Integration, Electrical Performance and Reliability Investigation of TSV

Shih-Wei Lee; Yu-Chen Hu; Cheng-Hao Chiang; Kuo-Hua Chen; Chi-Tsung Chiu; Ching-Te Chuang; Wei Hwang; Jin-Chern Chiou; Ho-Ming Tong; Kuan-Neng Chen

View Articletitled, Integration, Electrical Performance and Reliability Investigation of TSV

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The Reliability Study of a High density Multi Chip Packaging with Folding Flexible Substrate

Yin Wen; Bo Zhang; Yuan Lu; Liao Anmou; Du Tianmin; Lixi Wan

View Articletitled, The Reliability Study of a High density Multi Chip Packaging with Folding Flexible Substrate

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Ultra-fine pitch Package on Package solution for high bandwidth mobile applications

Rajesh Katkar; Zhijun Zhao; Ron Zhang; Rey Co; Laura Mirkarimi

View Articletitled, Ultra-fine pitch Package on Package solution for high bandwidth mobile applications

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High Reliability Fine Pitch WLCSP for High Pin Count Applications

David Lawhead; Ronnie Yazzie; Tony Curtis; Guy Burgess; Ted Tessier

View Articletitled, High Reliability Fine Pitch WLCSP for High Pin Count Applications

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RF devices: from WLSCP to smart interposers

Yann LAMY; O. El Bouayadi; C. Ferrandon; S. Joblot; A. Jouve; L. Dussopt; T. Lacrevaz; C. Bermond; B. Fléchet; G. Simon

View Articletitled, RF devices: from WLSCP to smart interposers

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Electrical Characterization on a High-Speed Wafer-Level Package

Kai Liu; YongTaek Lee; HyunTai Kim; MaPhooPwint Hlaing; Susan Park; Billy Ahn

View Articletitled, Electrical Characterization on a High-Speed Wafer-Level Package

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Advanced Microelectronics Packaging Solutions for Miniaturized Medical Devices

Rabindra Das; Steven Rosser; Frank Egitto

View Articletitled, Advanced Microelectronics Packaging Solutions for Miniaturized Medical Devices

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A Versatile Optical Head for 3D IC TSV Integration Process Control

G. Fresquet

View Articletitled, A Versatile Optical Head for 3D IC TSV Integration Process Control

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An Innovative 2.5D IC Interconnection Reliability System

Andrew Levy; Hans Manhaeve; Ed McBain

View Articletitled, An Innovative 2.5D IC Interconnection Reliability System

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