Changes in board technology, denser packaging due to board size limitations, and phone thickness trends pose number of technical challenges for designing IC packages for mobile applications. While thin packages are required to meet height constraints requirements, room temperature co-planarity and high temperature warpage become critical issues for packages with thin substrate, die, and mold cap. Similarly, while PoP provides numerous benefits from size and business standpoint; heat dissipation and thickness constraints requires continuous development of new packaging technologies. In addition, changes in board behavior is affecting the overall stress equation, making Chip-Package-Board interaction very important when deciding chip and package level interconnections. This presentation will highlight some of these challenges and identify technology innovations in areas such as System in Package (SIP) to mitigating these factors while simplifying supply chain and improving overall time to market.

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