The advent of the RoHS legislation, which mandated lead-free solders, and the rise in popularity of the BGA package, have resulted in ENIG becoming a popular choice for surface finish due to its excellent long term solderability and surface planarity. One of the pitfalls of this surface finish is the possibility of creating a layer of overly elevated phosphorous content between the electroless nickel and immersion gold, known as black pad defect. Most of the available literature suggests black pad defect is caused by accelerated reduction (corrosion) of the nickel in the nickel- phosphorus (Ni-P) layer during the immersion gold step of the ENIG process. Black pad defect can manifest as corrosion spikes at the nodule boundaries in the Ni-P and can progress to an abnormally thick high phosphorus region at the top of the Ni-P. One failure mechanism associated with black pad defect is the brittle failure of well wetted solder joints from the underlying Ni-P layer due to the presence of the high phosphorus region. In severe cases, black pad defect can cause solderability issues and retard the formation of tin-nickel intermetallic preventing good wetting of the solder joint. We have had the opportunity to examine many different cases of black pad, from severe to mild, and have a large amount of knowledge to share. This paper will give the reader a basic understanding of how to recognize black pad and subsequently determine its severity.
Research Article|
January 01 2010
Characterization of Black Pad Defect on Electroless Nickel- Immersion Gold (ENIG) Plated Circuits Open Access
Adam W. Mortensen;
Hi-Rel Laboratories, 6116 N. Freya, Spokane, Wa 99217
Phone: 509 325-5800, Fax: 509 325-9508, Email: [email protected]
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Roger M. Devaney
Hi-Rel Laboratories, 6116 N. Freya, Spokane, Wa 99217
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International Symposium on Microelectronics (2010) 2010 (1): 000608–000614.
Citation
Adam W. Mortensen, Roger M. Devaney; Characterization of Black Pad Defect on Electroless Nickel- Immersion Gold (ENIG) Plated Circuits. International Symposium on Microelectronics 1 January 2010; 2010 (1): 000608–000614. doi: https://doi.org/10.4071/isom-2010-WP3-Paper1
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