A comparison of the Cu electrochemical migration behavior between Cu lines with 5 um L/S realized by conventional Semi Additive Process (SAP) and an innovative Excimer Laser Damascene Process

Today the routing density today is still increasing. This leads to a reduced number of redistribution layers, which not only mean cost savings, it also avoids technological issues like warpage and problems arising with topography added per layer. This trend is mainly driven by multi-chip integrated fan out packages as well as high I/O CSPs on wafer and panel level.

Expressed in numbers, this means a reduction of the resolution down to two um and below. For Cu lines, a resolution of 10 um is common, while the opening width of VIAs in the dielectric material is in a range between 20 and 40 um. The resolution of the most common polymer dielectric material is primarily limited by its chemical abilities and the curing characteristics. The commonly used mask aligner technology operates also at its limits at a resolution of two um. A new approach to overcome these limitations was presented in the past [1]. Trenches and VIAs are formed in polymer by an excimer laser ablation within one process step. Cu is deposited and enforced by electroplating, which results in a filling of the ablated structures. The enforced Cu on top of the polymer is removed by chemical mechanical planarization CMP. The results are embedded Cu lines in the polymer with a planarized wafer surface. The photolithographic limitations of common polymers can also be overcome with this technology and it is possible to use non-photosensitive polymers like ABF dryfilms too. Besides the already mentioned aspects, there are several other advantages over the semi-additive processing approach.

Reducing the space between Cu lines sets new demands on the used polymers or the Cu line technology regarding electrochemical migration. The reduction of the line space results in a higher electromagnetic field between these lines. Cu ions tends to diffuse into polymers under the presence of moisture. This diffusion process is directed and enforced by the electromagnetic field between the Cu lines. The hydrated Cu ions are positively charged and migrate towards the cathode. In a worst-case scenario, they form dendrites and cause a short between the Cu lines. This phenomenon is already known and analyzed in the field of printed circuit boards. However, since the Fan-Out technology on Wafer Level as well as Panel Level tries to combine printed circuit board technologies and wafer level technologies this is a phenomenon, which cannot be neglected for CSPs. In addition, due to the overall trend of the reduction of the resolution this failure mechanism gets important for the conventional wafer level technology and the used materials as well.

One way to avoid this is to change components of the used polymer to suppress moisture diffusion or the ionic migration, which is not always possible or can have other unwanted negative effects on the characteristics of the polymer. Besides building a hermetic package, which is challenging and cost intensive, another way to improve the electrochemical characteristics of the redistribution layer is the way in which the lines are constituted. If the Cu lines were cladded with another metal, which has a better diffusion characteristic in polymers, this metal would act like a diffusion barrier for the Cu ions. The presented damascene process already has this characteristic as the adhesion layer of the sputter layer (mostly Ti or TiW) acts like a diffusion barrier and is located under and between the Cu lines.

Compared to conventional semi-additive realized Cu lines (see Figure 1), where this layer is only under the Cu lines the damascene process should realize Cu lines with an improved Cu electrochemical migration behavior.

Narrow Cu line structures between which an electrical voltage can be applied are needed to test the electrochemical migration behavior. Such simple structures can be interdigital capacitors in form of comb (Figure 2 A) or meander structures (Figure 2 B).

For this work, the meander structure was chosen as it allows some additional analysis to check the structures before and after testing. The final design includes dies with a resolution of five um lines and space and dies with two um lines and space. A part of the layout is shown in Figure 3. On the upper left side the contact pad can be seen. It is perforated to keep the resolution for everything the same and avoid maybe present area scaling effects during the processing of the test structures. For the same reason several additional lines (e.g. the ones with a 45° angle) have been added to keep the area distribution constant.

The samples are built up in semi-additive (SAP) and excimer laser damascene process technology. The realized test samples must undergo the temperature humidity bias (THB) resp. the biased highly accelerated stress test (bHAST). For the THB, the test samples are stored in a climate chamber with a temperature of 85°C and a relative humidity of 85% for several hours and for the bHAST, the samples are stored at 130°C and 85% relative humidity for 96 hours. A bias voltage of five V is applied between the Cu lines during both tests and the leakage current between the Cu lines is measured in-situ to determine when the current rises respectively a short occurred.

In total, four different IDC test samples will be realized by using two polymers and the two already mentioned process technologies. Both polymers are polyimides (PI) with low cure characteristics as they are currently very attractive for the use in Fan-Out applications. One PI is photolithographic patternable and widely used in the industry. The other one is a non-photo type and designed for laser ablation.

The fabrication of the different test samples is mostly consistent and only differentiates in the realization of the Cu lines. In the first step, the polymer will be applied by spin-on on a Si-wafer and cured to form the first polymer layer, which is seven um thick. In the second step, the Cu lines are formed. Their different realization will be discussed later. In the third step, is the second polymer layer (seven um) is applied in the same way as the first layer and the openings to the contact pads are done by laser ablation. In the fourth and last step, the contact respectively solder pads consisting of five um Nickel and 200 nm Gold are realized by SAP.

In the SAP variant of the test samples are the Cu lines formed by several process steps. The first polymer layer is sputtered with a seed layer of 100 nm Ti followed by 150 nm Cu. The Ti acts as an adhesion and diffusion barrier layer while the Cu is the seed for the electro-plated Cu. A resist is coated on top of the seed layer by spin-on. The resist is exposed with a mask aligner with the pattern of the IDCs and developed afterwards. The now exposed areas of the seed layer are enforced by an electroplating process to achieve 3.5 um thick Cu lines. The resist is stripped afterwards. The Cu lines are still shorted now. In the following wet etch process is the Cu first and then the Ti etched. This step is critical especially for resolutions going down to two um and below as the under-etching of the seed layer is hard to control and maybe result in a lifting of the Cu lines or strong deformation of the cupper lines without proper process control [2]. During the sputtering process, metal ions get into the upper nm of the polymer layer, which causes a higher shunt conductance. In the last step a plasma de-scum is necessary to remove this upper layer.

The way to form the Cu lines for the laser damascene samples is quite different. The pattern of the Cu lines is ablated in the first polymer layer by using an excimer laser ablation system (ELP300) from SUSS MicroTec. This excimer laser system works different to the very common laser ablation systems from the printed circuit board (PCB) technology, in which a single laser beam ablates sequentially mostly VIAs or very simple structures. Here a laser beam with a wavelength of 248 nm is directed through a quartz glass mask with structured aluminum, which defines the ablation structures. A reduction lens system behind the mask projects the mask pattern on the wafer. The alignment and movement of the wafer is provided by a stepper platform. The whole systems is similar to a stepper exposure tool with the difference that the structures are ablated instead of exposed. This allows to structure more complex shapes compared to the PCB laser tools. The ablation rate, which indicates how much polymer will be removed per one laser pulse, depends on the fluence, the feature size and the used polymer. At the end, the final ablation depth will be defined by the number of laser pulses, as the polymer mostly cannot be changed for other reasons. For the test samples, trenches of 3.5 um depth are ablated. The proper ablation parameter were investigated in former works [3]. The ablation generates debris on top of the polymer surface, which has to be removed before going on with processing. Only the non-photo PI is designed to generate no debris and the cleaning step can be skipped for that material. After cleaning the surface of polymer layer one, the same seed layer as used for the SAP test samples is sputtered. The Cu is enforced by electroplating without any masking resist until the ablated trenches are completely filled with Cu. The resulting overburden outside the trenches is removed by a Cu chemical mechanical planarization (CMP) step. The proper CMP parameter have been also investigated in former works to reduce the mechanical stress in the layer during the CMP step [4]. Since the used CMP slurry is selective to the Ti, the process stops at the Ti layer. The Ti can either be removed by a wet etching step (problem of under-etching of small features), a second CMP step or also with the laser ablation system, which is faster. The laser has no ablation effect on the Ti. However, due to the high energy of the laser, an energy shock impulse is introduced in the polymer under the Ti, which results in a lifting of the Ti or other thin metal films. This laser seed-layer-removal (SLR) is done by only one pulse and mask-less. It could be shown [4] that the laser SLR also removes the few nm of polymer with the higher shunt conductance (due to the sputtering) and no additional plasma de-scum is necessary. A FIB cross section of IDC fingers realized by that technology can be seen in Figure 4.

The final wafers are measured on a wafer prober to determine the yield, the process stability and to select only known good dies for the HAST test. These dies are mounted on a fixture and cables are soldered to the NiAu pads for the bias application and in-situ measurements during the thermal humidity storage.

The wafers are processed like described in section II B. The realization of the five um samples in the SAP as well as the laser damascene variety is no technological challenge. However, the processing of the two um variety in SAP-technology is slightly more complicated and the process is not very reliable as the mask aligner technology operates at its resolution limits. A resolution close to two um is only possible by special filters, hard contact during exposure and an extended exposure dose. It can be seen in Figure 6 that the copper line width is bigger than the space width in SAP (A) compared to the laser damascene structures (B), in which the line width is the same as the space width. At several places of the wafers is the resist structure so thin or unstable that it results in an under-plating of the resist, which in turn leads to a short. A short by under-plating is not possible in the laser damascene processing due to process concept itself. The only step, which can result in shorts in the laser damascene approach, is an insufficient CMP step. This step can be controlled very precisely and remaining overburden on top of the polymer can be optically detected very easy, which in turn is not always the case for under-plating during SAP.

The necessary seed layer etch during SAP also attacks and decorates the copper lines, which can be seen in Figure 5 A. The CMP step and/or laser seed layer removal at the laser damascene process only attacks the upper surface and results in much smoother surfaces (Figure 5 B).

The leakage current of every die is measured before dicing to get an impression of the wafer yield. The leakage current of every variety is in a range between 10⁻¹² and 10⁻¹³ A. The yield of the five um sample wafers is the same for the SAP and laser damascene process. The wafer yield maps of five and two um SAP samples on a 200 mm wafer differ significantly and can be seen in Figure 6. The already mentioned under-plating issues at two um results in a high amount of shorted IDC all over the wafer. The wafer yield maps of the two um laser damascene samples cannot be compared to the SAP ones as the failure mode in this case is not a short but a missing structure due to line erosion during CMP (copper line height of two um lines is lower to keep the aspect ratio). As the measured leakage currents of proper structures are very low, a missing structure would result in a similar current reading and would distort the yield map.

The sample preparation for the non-photo PI is still ongoing at the moment and the results will be presented in future publications.

Six of the photo-PI SAP samples (5 um) were stressed in a HAST test chamber from Espec North (EHS 221) at 130 °C and 85 % for 96 hours and a BIAS of 5 V was applied. After the storage, every sample was checked for shorts by a resistance measurement and inspected by microscope. No sample shows a higher leakage current or a short. Furthermore, no material degradation or growth of dendrites could be observed. In summary, every sample passed the HAST test without noticeable change in material.

The six (photo-PI/5 um) laser damascene samples are stored in a climate chamber from Vötsch (VC4018) at 85 °C and 85 % relative humidity. A BIAS of five V is applied and the leakage current is measured in-situ to determine the time of a failure. This temperature humidity bias (THB) test is still ongoing. The readings of one sample until 500 h can be seen in Figure 7. The inconstancy in the measurement is a result of a needed maintenance intervention at the climate chamber during the storage. Until that time, none of the samples shown any change in leakage current nor shorts. The optical inspection can only be done after the complete storage.

The electrical measurements after processing of the five um structures showed no differences between the semi-additive processed and the laser damascene processed photo-PI samples.

The SAP samples as well as the laser damascene samples showed no electrical failure or material changes during resp. after testing until now.

The processing of the two um structures in SAP was difficult and a poor wafer yield resulted. The FIB cross-section of these samples show a deviation of the copper line width (see Figure 8). Furthermore, the cross-section reveal a problem with the second polymer layer. Small bubbles seems to be entrapped between the copper lines. The entrapped air volume had to be so small that the bubbles did not pop up during the cure of the polymer and the bubbles are so small, that they could not be detected by a microscope inspection. The five um structures did not show these bubbles. The process for polymer two has to be modified to avoid bubbles between fine line structures. Due to the process concept, this is not necessary for the laser damascene process.

Until now, both process variants showed no electrochemical migration. Due to that, a final conclusion is not possible at this moment. It could be shown that both process variants have no significant differences in isolation capabilities after processing. The laser damascene approach has the potential to define fine line patterns more precisely and robust compared to SAP processing with mask aligners. From a theoretical point of view, this approach should also has better electrochemical migration capabilities due to the cladding effect of the seed layer.

The author would like to thank the colleagues of Fraunhofer IZM and TU Berlin, which were not mentioned as coauthors. Furthermore the author would like to thank the teams from SUSS MicroTec and Fujifilm Electronic Material for their support.