Advanced Packaging for Automotive Dashboard Application

There are huge number of electronics systems in automotive cars and trucks today, and it increases year to year due to new regulations established by the National Transportation Safety Board (NTSB), strong demand from the consumer markets, and so many other factors. Autonomous or driver-free cars are accelerating demand for more electronics systems in automobiles. The total number of vehicles sold in global markets is also significently increasing due to growing demand in Asia and Latin America. The automotive market is expected to be one of the leading growth segments in the semiconductor industry. Figure 1 shows the recent growth of the automotive IC market.

Typical electronics systems in new vehicles are engine control units, power steering, transmission control, anti-lock brakes, stability control, airbag, infotainment, safety sensors, cameras and Advanced Driver Assistance Systems (ADAS). Some of the components located under the hood of the vehicle run at very high temperatures while components in the dashboard or cabin operate in a less harsh environment and lower ambient conditions.

The automotive industry has gone through many different phases of technology evolution, primarily due to serious concerns with safety regulations. Examples of recent areas of evolution are ADAS, infotainment and cameras. The mandates from worldwide regulatory agencies, new market demands, and aggressive targets for assisted and autonomous driving have created tremendous momentum across the automotive industry supply chain. Various semiconductor packaging opportunties are opening up in the growing automotive market. However, numereous barriers or challenges still exist in the market such as:

1. How to make automobiles safer?

2. How to integrate entertainment, communication, navigation, and safety features in the car?

3. How to drastically improve the life of electronic products from 2 years, which is typical in the consumer or mobile market, to 10+ years for the automotive market?

4. How to meet very high quality, reliablity and handling requirements at a lower cost?

To successfully address these challenges, the entire automotive industry is undergoing a major restructuring and is collaborating with different companies to develop solutions that meet the essential requirements of the automotive market

Automotive semiconductor components must be compliant with the following criteria:

1. AEC-Q100 with capabilities for each temperature grade

2. AEC-Q006 for Cu Wire bond package (introduced recently)

3. ISO TS 16949 certified

4. Zero manufacturing defects

5. Special process and BOM with increased screening and inspection

6. Dedicated assembly line, equipment, operators, and process control plan

7. Complete tracking and monitoring of the entire manufacturing, shipping and supply chain process with detailed information.

The Automotive Electronics Council (AEC) established a standard grade called AEC-Q100 which must be meet for all IC supply chain makers. The main objective of AEC-Q100 is to determine that an IC component is capable of passing the specified stress tests, and thus can be expected to deliver a certain level of quality and reliability in the application field. The AEC-Q100 temperature grades are shown in Table 1.

The grades represent various application spaces in the automotive market from extreme under the hood applications to very mild application conditions. Beyond AEC-Q100 certification, automotive vendors need a specialized manufacturing flow and a bill of materials (BOM) with increased inspection and screening, both in manufacturing and reliability testing. Typically IC companies perform both package and system level tests, however, assembly suppliers can also perform package level and board level tests to verify the assembly process and BOM. In 2015, the AEC introduced a new set of AEC-Q006 requirements for qualification of copper (Cu) wire interconnect for the components used for automotive applications. AEC-Q006 applies to mainly wirebond packages such as FBGA, QFN, PBGA, etc. The AEC-Q006 process helps to identify Cu lead frame cracks, Cu wire/lead frame delamination, and other failures in the assembly process. An automotive IC assembly factory has to be ISO certified with TS 16949. In addition to factory certification, an assembly supplier has to maintain a dedicated manufacturing line and equipment, operators, process and control plan to ensure an automotive line is very robust and error proof. Wirebond packages require special material for wire type and size, lead frame type, die attach epoxy type, and mold compound type. Gold (Au) wire has been used in the automotive industry for many years due to its low inductance, ductility and no oxidation properties. Over the last decade, Au prices have significantly increased, forcing the IC industry to look for an alternate material. Palladium (Pd) coated Cu wire is one of the best alternatives to Au wire for automotive electronics. There are various challenges that Cu wire assembly suppliers have been addressing such as cracks in the ball bond area, lower shear strength, oxidation, voids, intermetallic formation, etc. Assembly suppliers are swiftly moving to qualify Cu wire for various grades of automotive qualificiation. Punched quad-flat no lead (QFN) or side solderable QFN with half cut in the assembly process packages are typically used for automotive applications. Roughened lead frame is used to improve epoxy molding compound (EMC) delamination whereas a side solderable design provides ease of inspection of the sawn QFN package. Typical side solderable sawn QFN is shown in Figure 2.

Due to the increasing complexities and higher performance, pin count, power, and cost requirements of automotive applications, the packaging industry is moving towards high performance packages such as flip chip or wafer level fan-out packaging for automotive infotainment, GPS, and radar applications. About a decade ago automotive ICs were primarily low lead count, high power wirebond packages used in engine control modules to small dashboard applications and sensors. Figure 3 shows a typical roadmap for IC automotive packages used in dashboard applications.

In consumer or automotive applications, flip chip packages are needed for higher functionality, faster data rates and increased bandwidth which are required for enhanced user interfaces, rich graphics and outstanding audio quality. Wire bonding technology, a popular packaging choice in the past, is often unable to successfully address the increased thermal and electrical performance requirements for next generation automotive applications and, as a result, semiconductor companies are turning to high performance flip chip interconnect to differentiate their products. The bond-on lead (BOL) interconnection with fine pitch Cu pillar bumps, also known as fcCuBE^® technology, delivers exceptionally high I/O density and bandwidth with excellent electromigration (EM) performance for high current carrying automotive applications at a cost competitive price in the industry. Figure 4 shows a typical Cu pillar bond on trace interconnection for a flip chip package.

The fine pitch Cu pillar technology evaluation for low cost automotive/consumer packages has proved that the technology is very robust for assembly and performs exceptionally well through all critical JEDEC level reliability and high current Electromigration (EM) testing. Extensive package and board level data was collected for automotive grade 2 and 3 applications for bond on trace flip chip packages. Table 2 shows some typical JEDEC standard reliability results.

EM tests were performed on fine pitch Cu column BOL interconnections and bond on pad (BOP) structure for various temperature and current conditions. Over 7000 hours of EM tests were conducted and no failures were observed. Very insignificant resistance shifts were observed irrespective of current stress and temperatures as shown in Figure 5. However, partial crack, solder diffusion, intermetallic compound (IMC) thickness formation, etc. were observed in the interconnection during EM tests. There is a thicker IMC formation on the substrate side (bond side) than Ni barrier side (Cu pillar side) as shown in Figure 6 below.

In the automotive flip chip package, silicon integration is gaining traction in both System-on-Chip (SoC) and System-in-Package (SiP) areas. Both SoC and SiP technologies have a much higher potential to improve performance and power while reducing size and cost for automotive applications. Today, SiP technology is expanding into market segments such as automotive due to the rapid time–to-market and overall cost savings that can be achieved.

IC vendors are enabling more advanced features in the car to make it smarter with seamless performance. SiP technology is helping to add more featrures in the IC. Advanced technology such as flip chip is farther ahead than other packaging technology in terms of device level integration and combining various components together for the ease of performance, cost and time to market. Assembly challenges such as component placement accuracy, narrow gap between the components, the right BOM selection and manufacturing yield are the major concerns for flip chip SiP. A large flip chip SiP automotive package is shown in Figure 7. Full package level qualification for grade 2 automotive for the SiP was recently completed. Table 3 below shows detailed reliability data along with conditions.

Today the auto industry is focusing on grade 1 or 0 conditions for better process and reliability margin, even for dashboard products. In order to meet these requirements, the assembly industry has taken a proactive approach to fulfill future need for automobiles. To address the issues, an internal TV has been identified and carried some initial reliability tests for grade 1 and 0 conditions. A 23×23mm flip chip BGA (fcBGA) package with 4L build up substrate and 0.8mm ball pitch package was used to run the design of experiment (DOE). Initial data suggested the package BOM and process is very robust and comfortqbly meets grade 1 or 0 condition reliability tests. Table 4 below shows the comprehensive results out of the DOE. More investigation will be carried out to double confirm the process and the BOM for grade 1and 0 conditions.

An important innovation in IC packaging happened in the area of auto safety and ADAS which uses bug free software and hardware to alert drivers to potential hazards and problems to prevent collisions. Wafer level chip scale packaging (WLCSP) and fan-out wafer level packaging (FOWLP), also known as embedded wafer level ball grid array (eWLB), are commonly used for 60 to 79 GHz ADAS radar applications. It provides a smaller form factor and a reduced interconnection parasitic which is very critical for high frequency applications. Other advanges of wafer level processing are smaller tolerances which enable better assembly yield results and a lower cost. The overall packaging roadmap is expected to go through a number of changes for RF radar applications from 24GHz to 79GHz. High frequency radar systems are needed to detect objects in a longer range and wider angle. Figure 8 shows how the packaging landscape of ADAS changes over time.

System level integration is also happening in wafer level packages. Figure 9 shows a multi-chip fan-out WLB SiP. The standard fan-out package eliminates the need for a laminate substrate and replaces it with Cu redistribution layers that inherently have a much shorter connection from die to the circuit board with a significantly reduced impedence. Advanced FOWLP is now becoming an attractive solution for thinner profile and higher level of integration packages in a wide range of applications. The design flexibility of this method allows for integration of multiple dies, passives, and other discrete components in the package.

FOWLP uses a very thin film processing RDL which currently delivers 8μm/8μm lines space ratio and is heading to 2μm/2μm target in near future. It also helps to place various components with less than a 100μm gap from each other, enabling very thin and small form factor SiP. This type of solution positions the radar chips as a very attractive solution for automotive and non-automotive applications.

One of the basic requirements for automotive ICs is to qualify the package with AEC-Q100. In most of the cases, both package and board level package qualification reliability tests are performed by the IC customer, although sometimes the package assembly vendor has to conduct the tests to ensure their capability. Reliability tests for in cabin or dashboard applications are not as harsh compared to under the hood applications. Standard IC package reliability tests are pre-conditioning, temperature cycling, high temperature storage life, temperature humidity bias, unbiased highly accelerated tests, board level thermal cycling and drop tests. Typical grades for in cabin applications are between grade 2 to 3. However, today IC vendors are required to qualify to grade 1 even for dashboard applications. Wirebond packages with Au wire can comfortably meet grade 1 requirements.

Flip chip packages are primarily for grade 2 applications. However, similar to wirebond requirements, some IC vendors are looking for grade 1 in flip chip technology. As demand for FOWLP emerges in the automotive area, there was a concern if FOWLP can fulfill grade 2 or grade 1 requirements. Some of the recent fan-out data shown in Table 5 and 6 below proves that fan-out packages are robust for in-cabin applications.

FOWLP with integrated passive device (IPD) offers significant product footprint miniaturizations, reducing the package size by more than 50%. Therefore, the electronic controller unit (ECU) PCB size can be reduced by using FOWLP technology. Also the ability to provide 3D SiP and package-on-package (PoP) with embedded passives and active components provides a direct vertical interconnection across all embedded devices (Figure 10). This capability offers a cost effective alternative with streamlined and efficient FOWLP infrastucture compared to TSV technology. In the case of advanced automotive radars, multiple passives or IPDs removed from the PCM using a cost effective FOWLP PoP structure shown in Figure 10 (a). If the radar deisgn allows, the antenna can be flip chip bumped or assembled in a FOWLP such as in the prestack PoP configuration shown in Figure 10 (b).

The automotive IC markets continue to grow at 10% CAGR and the need for semiconductor packaging and test is growing at a similar pace. With the phenomenal expansion of various technology offerings and manufacturing footprints, assembly suppliers are positioning themselves to support the strategic growth of very cost effective, high performance packages for automotive and other consumer applications. With the evolution of various new technologies, it is expected that significant cost benefits can be achieved from packaging technology. Similar to consumer and industrial products, automotive applications are also migrating to higher power, higher density devices and some special requirements. As the cost of product development continues to grow; assembly suppliers will need to make investments at the same rate. Time-to-market pressures remain high, with design cycles getting shorter and market-driven product requirements skyrocketing at much lower price points. This is one of the key challenges across the supply chain.

The drive for massive system integration, both in advanced flip chip and wafer level fan-out solutions, will require additional control and ownership by OEMs, which will eventually trickle down the supply chain. Therefore, packaging solutions will need to offer a very robust process, infrastructure and established supply chain base with a very minimum risk and higher degree of repeatability to meet these requirements.

The authors would like to thank R&D team of STATS ChipPAC Korea, and wafer level fan out (eWLB) team in STATS ChipPAC Singapore for their continued guidance in the study. The authors want to express gratitude to the individuals at our partner companies that helped design the advanced packages.