The barrier and seed layers for electroplating of copper play a critical role in the realization of through silicon vias (TSV) in 3D IC packaging. Physical vapour deposition (PVD) is still the preferred method for depositing these films, but must meet the technical challenges presented by the need to line high aspect ratio vias of 10:1 or more that often have rough sidewalls, and the market demand of low cost. A bilayer of TaNx/ α-Ta is the preferred diffusion barrier for copper metallization in CMOS multilevel damascene structures, providing a good adhesion and wetting layer for the PVD copper seed layer. A new method called Highly Ionized Sputtering (HIS) has been developed using power pulses of 50 to 200μsec length with a low duty cycle but very high peak current of several hundred amps. The high pulse current generates a very high ionization fraction of the sputtered material giving – with an appropriate bias voltage applied to the wafer – a high directionality of metal ions and providing very dense films as needed for the diffusion barrier. HIS uses regular sputtering equipment, planar targets and works at low target-to-substrate distances thus providing excellent transfer factors of the ionized PVD material, resulting in high target utilization and a low cost of ownership. HIS hardware and processes with competitive deposition rates, good uniformities and low stress have been developed on the Oerlikon 200mm and 300mm PVD cluster tools for TaNx, Ta, Ti and Cu. The applicability has been verified experimentally in TSVs with different sidewall qualities and supported by simulations.

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