In this paper, a novel flip chip interconnect structure called Bond-On-Lead (BOL) and its ability to reduce stress in the sensitive sub-surface ELK (Extra Low K) layers of the die is presented. BOL is a new low cost flip chip packaging solution which was developed by STATSChipPAC to dramatically reduce the cost of flip chip packaging. The BOL solution allows for efficient substrate routing by virtue of the use of narrow BOL pads and the removal of solder mask in the area of the BOL pads, which eliminates the limitations associated with solder mask opening sizes and positional tolerances. In addition to the compelling cost benefits, modeling results are confirmed with empirical reliability testing data to show that BOL is superior to the traditional Bond-on-Capture Pad (BOC) configuration from a mechanical stress and reliability perspective. The focus of this paper is on the theoretical analysis of the stress, strain, and warpage associated with the BOL configuration compared with the traditional BOC structure. For the package deformation, the global finite element method is used to simulate the package warpage. For the local bumping reliability, the focus is on the ELK layers which are the critical locations affecting the package's reliability. The local finite element simulation is conducted to compare the critical ELK layers stresses with BOL structure vs. with traditional BOC structure.
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Research Article|
January 01 2010
Improvement of ELK Reliability in Flip Chip Packages using Bond-on-Lead (BOL) Interconnect Structure Open Access
Eric Ouyang;
STATSChipPAC Inc, 47400 Kato Road, Fremont, CA 94538
Email: [email protected]; Tel: 408-979-8383
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MyoungSu Chae;
MyoungSu Chae
STATSChipPAC Inc, 47400 Kato Road, Fremont, CA 94538
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Seng Guan Chow;
Seng Guan Chow
STATSChipPAC Inc, 47400 Kato Road, Fremont, CA 94538
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Roger Emigh;
Roger Emigh
STATSChipPAC Inc, 47400 Kato Road, Fremont, CA 94538
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Mukul Joshi;
Mukul Joshi
STATSChipPAC Inc, 47400 Kato Road, Fremont, CA 94538
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Rob Martin;
Rob Martin
STATSChipPAC Inc, 47400 Kato Road, Fremont, CA 94538
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Raj Pendse
Raj Pendse
STATSChipPAC Inc, 47400 Kato Road, Fremont, CA 94538
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International Symposium on Microelectronics (2010) 2010 (1): 000197–000203.
Citation
Eric Ouyang, MyoungSu Chae, Seng Guan Chow, Roger Emigh, Mukul Joshi, Rob Martin, Raj Pendse; Improvement of ELK Reliability in Flip Chip Packages using Bond-on-Lead (BOL) Interconnect Structure. International Symposium on Microelectronics 1 January 2010; 2010 (1): 000197–000203. doi: https://doi.org/10.4071/isom-2010-TP2-Paper1
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