There are numerous process integration schemes currently in place for the implementation of 3D-IC. Via first, via middle, via last along with back end of line (BEOL), front end of line (FEOL) and other variations of these approaches. This work will explore the role of wafer bonding, both permanent and temporary, in the fabrication of 3D-IC. Additionally, the materials and process flows used for these processes will be examined in detail.

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