Over the past several decades the quest to design electronics that boast ever increasing capabilities while continuously decreasing their size and weight has led to the development of a series of new packaging solutions. As the need for more functionality in less real estate increased, Multiple Chip Modules (MCM) were no longer satisfactory in many applications. Today, these applications call for a highly integrated packaging approach which often incorporates multiple functionalities into one package. In situations where time to the market for SOC (System on a Chip) is too slow or too costly the approach of System-in-a-package (SIP) can be the ideal solution.

One element in modern packaging is the use of new 3D structures and high-k dielectric materials. The second element is advanced packaging methods. New technologies such as chip-on-chip assemblies have been developed. The third element has been the progression in design tools that allow engineers to seamlessly design an overall, highly integrated system. The forth element, testing, is often an expensive part of product development. With SIP technology that cost can be significantly lowered, making new product development economically more feasible.

In this paper we present a systematic approach to designing highly integrated and miniaturized SIP packages. This approach enables rapid design, prototyping and time to production while achieving a new level of integration, miniaturization and reliability.

Finally, a case study is presented to demonstrate a typical maturity cycle of a SIP, in this case for a wireless application.

This content is only available as a PDF.