High Speed, High Density Separable Interconnect - 1000 plus I/O ultra-low profile interfaces

As electronics technology has evolved from the desktop to mobile performance, several technology trends and challenges have emerged. The drive to reduce physical size of handsets, tablets, mobile computers as well as the electronics in automotive, server, data center and mil/aero applications have resulted in semiconductor packaging increase in pin count and reduction terminal pitch. The package routing and density provides interconnect from the fine featured silicon to the larger featured printed circuit board. In many ways, electronics evolution has been and is limited by the printed circuit technology used to interconnect the various components and function. Pin counts on high performance devices such as processors, FPGAs, memory, SoC and RF modules have trended higher due to increases in I/O as well as power and grounding schemes required for signal integrity and crosstalk shielding. Signal Integrity, crosstalk issues, and routing density in production environments have actually driven an increase in terminal pitch is some cases as I/O counts and system complexity drive relaxation of terminal pitch in order to enable proper integration and function with a cost effective printed circuit board and assembly. When the internal assembly is examined, there are typically areas of very high density at the silicon level, and areas of relatively low density in areas where sub-assemblies are interconnected or areas where connections to the next level of system or outside world are terminated. When various connectors are examined within a system such as memory, CPU, backplane, board to board, flex to board, transceiver, and cable the geometries, terminal pitch and pin count density are an order of magnitude less dense than at the silicon and package level. HSIO Technologies produces very fine pitch high speed SMT mounted sockets and that allow a system engineer the ability to plug and unplug a packaged IC device directly into a test or consumer platform, and has applied the design principles to create very high density system level connectors to increase density and overall performance within existing platforms as well as provide several generations of improvement.

Traditional IC sockets and connectors are generally constructed of an injection molded plastic insulator housing which has stamped and formed copper alloy contact members stitched or inserted into positions within the housing that are shaped to accept and retain the contact members. The assembled socket body is then generally processed through a reflow oven which melts solder balls and attaches them to the base of the contact member. During final assembly onto the PCA, the target interconnect positions on the circuit board are printed with solder paste or flux and the socket assembly is placed such that the solder balls on the socket contacts land onto the target pads on the pcb. The assembly is then reflowed and the solder balls on the socket melt and when cooled they essentially weld the socket contacts to the PCB, creating the electrical path for signal and power interaction with the system. In the case of memory sockets and backplane connectors, plated through holes accept terminal pin features that are soldered. During use, this assembled socket or connector receives the packaged integrated circuits or a mating connector and connects each terminal on the package or connector to the corresponding terminal on the PCB. The terminals are held against the contact members by applying a load or resultant normal force, which is expected to maintain intimate contact and reliable circuit connection throughout the life of the system without a permanent connection such that the interface can be unseated removed or replaced without the need for reflowing solder connections. As systems advance to next generation architectures, these traditional interconnects have reached mechanical and electrical limitations that mandate alternate methods.

As processors and systems have evolved, several factors have impacted the design of traditional sockets and connectors. Increased terminal counts, reductions in the distance between the contacts known as terminal pitch, and signal integrity have been main drivers that impact the socket and contact design. As terminal counts go up, the IC package essentially gets larger due to the additional space needed for the terminals. As the package grows larger, costs go up and the relative flatness of the package and corresponding PCB require compliance between the contact and the terminal pad to accommodate the topography differences and maintain reliable connection. The package producers tend to drive the terminal pitch smaller so they can reduce the size of the package as well as the flatness effects. As the terminal pitch reduces, the available area to place a contact is also reduced, which limits the space available to locate a spring or contact member which can deflect without touching a neighbor. In order to maximize the length of the spring so that it can deflect the proper amount without damage, the thickness of the insulating walls within the plastic housing is reduced which increases the difficulty of molding as well as the latent stress in the molded housing which causes warpage during the heat applied during solder reflow. Long contact members tend to reduce the electrical performance of the connection by creating a parasitic effect that impacts the signal as it travels through the contact. Other effects such as contact resistance impact the self-heating effects as current passes through power delivering contacts, and the small space between contacts can cause distortion as a nearby contact influences the neighbor which is known as cross talk. Traditional socket methods are able to meet the mechanical compliance requirements of today's needs, but they have reached an electrical performance limit. Next generation systems will operate above 5GHz and beyond and the existing interconnects will not achieve acceptable performance.

In an effort to enable reduction in terminal pitch, a laminar structure is built to produce the insulator housing. Polymer layers are patterned and fusion bonded in a stack appropriate to the intended geometry to imitate an injection molded housing without the need for molds or tooling. In many cases features and internal wall sections of 50 microns or less can be created with this method while they are not moldable. Fine metal contact stampings are inserted into the housings and processed in a unique way that eliminates contact insertion stress and solder wicking potential.

The socket housing can be the exact same size as the target IC device, and is soldered directly to target allowing the package to be plugged and retained by the contact member.

In most cases, the fine geometry of the contact construction, short electrical length and soldered connection at the pcb level results in excellent signal integrity.

As mobile platforms have advanced, many of the IC packages have experienced a terminal pitch reduction below 0.4 mm with over 1000 pins, often with memory and logic stacked on top of each other to reduce latency and circuit board real estate.

As these devices are becoming more and more complex with increased function, low voltages and power management to conserve battery life, higher bandwith RF poerformance, increased graphics and data processing all contribute to the situation where it is very difficult to predict performance prior to soldering the chips into the system.

The socket technology developed enables the various SoC, Memory, PMIC, and RF devices to be plugged directly into the final platform and be removed and replaced as silicon and software are validated. In volume production, ICs are soldered directly to the platform and typically underfilled to survive shock and drop requirements, but the connector density required to socket the IC devices can apply to more global interconnect density improvments beyond the IC package level.

In today's state of the art smart phones, tablets and notebooks the routing denisty is typical greatest at the silicon locations with very fine area array pitch, then fan out to more relaxed pitch connectors and interfaces.

Typical board to board or flex circuit connectors used to interconnect the various subs-assemblies have lateral patterns of 0.4 or 0.5 mm pitch with pin counts less than 100 vs. the 1000 plus for an advances SoC.

A close up view of the SoC socket indicates an connector system capable of 0.35 mm pitch area array in a format that is high density high speed circuit to circuit seperable interface. The package substrate is essentially a high density small form factor printed circuit board, and the socket is a high density high speed board to board or mezanene connector interfacing to the main system circuit board.

Another aspect of the connector technology that is unique is the method used to retain the contact members. Conventional connectors typically are stiched into the housing with features that press fit into an interferance feature and retain the contacts while the interferance fit prevents solder wicking during reflow. These press fit features often add parasitic effects and degrade signal integrity while also limiting the pitch capability du to the room needed ofr the added features. In this case, the laminar nature of the housing is taken advantage of while the contacts are installed with little to no press fit and a post assembly process fuses material surrounding the contact, retaining them in palce and creating a wicking barrier.

In some cases, the base of the connector is treated like a printed circuit, where metalized pads are imaged to increase the solder wetting surface and add strength to the solder joint. This surface also creates a platform for circuitry and routing if desired.

To further extend the principle, a selective metalization process has been developed to directly plate copper onto the housing surfaces, including a traditional injection molded LCP housing, creating a platform for internal shielding.

To extend the socket technology to connector systems not involving a package IC BGA device, a copper pillar terminal creation process was developed to replicate the scenario of the contact members gripping a solder ball.

A field of terminals is resist defined and grown en masse with an electroplating process down to 0.35 mm area array pitch creating a platform for any circuit, cable, or subassembly to be a pluggable interface with very high density and signal integrity up to 40 GHz or more. Gold to gold interfaces provide reliable and stable connection.

Many configurations are possible, while treatment of the interface as if it was a printed circuit enables embedded decoupling, signal shielding, and internal ground planes.

For applications where the pillar terminal plating process is not practical or for existing circuits that would bennfit from the connectorized interface, a process was developed to add solid copper balls to and existing mask define or metal defined pads. The resulting shape provides a strong interface to the circuit as well as an engineering fit with the mating contact member to provide a interface more reliable over time and temperature compared to a pure solder ball.

Contact to terminal engagement can be refined by load ballancing positioning of the contact members, as well as variation of the pillar interface geometry to create semi-locking features for rugidized interconnect.

Large pin field applications exceed 1000 terminals can be force ballanced and tailored to have only select pins within the field designed with higher retention features to aid with insertion and extraction of the seperable interface.

A further adaptation is to provide Zero Insertion Force or Low Inserrtion Force contact engagement with external actuation or retention. Mutiple points of contact and increased surface area reduce inductance and CRES.

An example of system level integration at a higher level is to establish a platform that requires high speed perfermance from the device to an external location, or from one location within the system to another. The connector interface is soldered to the platform PCB, while the mating terminals are integrated to a high speed flexible cable or circuit.

A new way of looking at connector manufacturing inspired by the process of validating semiconductor devices has created the ability to further increase the interconnect density of traditional connector technology. A list of benefits and future developments include:

• -potential for reducing the complexity of a traditional contact member and insulator housing.

• -potential for reducing parasitic effects of contact

• -compatible with existing high volume manufacturing techniques

• -relies upon known spring properties and solder joint methods

• -potential for adding stiffening features to reduce the effects of heat induced warpage during solder reflow

• -potential for reducing the cost and complexity of the IC package and/or the system pcb by adding function to the socket

• -increased solder joint reliability by adding mechanical decoupling that improves the shear strength of the joint

• -ability to reduce or redistribute the terminal pitch without the addition of an interposer or daughter substrate

• -potential to add grounding schemes within the socket that may reduce the number of connections to the pcb and relieve routing constraints while increasing performance

• -potential for shielding to be added to regions throughout the socket to reduce the effects of cross talk

• -potential for adding power delivery and power management to the socket and reducing the load on the pcb

• -potential for connecting high speed signals between sockets external to the main pcb

• -potential for adding internal decoupling capacitance to reduce the need for package and or PCB decoupling,