For five decades, the semiconductor industry has distinguished itself from other industries by continuously reducing IC sizes while exponentially increasing functionality (Moore's Law) that enabled IC shrinkage and lower cost. The problem now is that IC shrinkage hit a brick wall, in response, a new paradigm shift is emerged—packaging technologies. Industries now focusing on shrinking the IC packaging through stacking and system integration. This talk presents electronics packaging miniaturization trends from ball grid arrays to wafer level and stack technologies with emphasis on system to package qualification and reliability testing methodologies and results.

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