Systematic Design of Ka-band Transmitter Modules using the M3-Approach Open Access

Communication satellites connect people all over the world, and provide a myriad of services such as telephone, TV, radio and internet. These services have a significant impact on the lives of humans, especially in areas where terrestrial networks are not available because of geographical and/or economic reasons, or in areas where the networks have been destroyed as a result of a disaster. To meet the ever-increasing demand for broadband data communication, Ka-band satellites (uplink: 27.5 – 30 GHz; downlink: 17.7 – 20.2 GHz) have been introduced to enhance the Ku-band satellites. Majority of commercial Ka-band satellites are geosynchronous, orbiting about 36 000 km above the earth. Therefore, ground/earth stations must be designed to overcome the free space path loss caused by this distance. In stationary earth stations, large parabolic antennas are used to overcome this attenuation. However, such cumbersome antennas cannot be used for the development of earth stations on mobile platforms (ESOMPs) for emerging applications. These ESOMPs require small RF front-end modules (with steerable planar antennas) to provide on-the-move broadband services to passengers on moving vehicles, aircrafts and trains. The design of such miniaturized RF front-end modules is a formidable task, and requires the use of holistic approaches which lead to optimized designs without numerous and costly re-design iterations.

Research activities in the area of Ka-band front-end modules for satellite communication applications have exploited so far new design methods for the transceiver components such as the switches [1], antennas [2] as well as new methods for packaging these antennas [3]. Furthermore, surface mount packaging techniques for integrating front-end Ka-band ICs [4] have also been studied. However, to enable widespread application of these Ka-band modules, their development cost must be reduced. One way to reduce this cost is to apply a systematic design approach which prevents costly re-design iterations, or at least, drastically minimizes the number of re-design iterations. To the best of the author's knowledge, there is no published work in which such an approach has been proposed, or applied for the design of Ka-band modules.

In this work, we present, and illustrate a holistic approach, the M3-approach (methodologies, models, measures), for designing miniaturized, scalable, high-performance and low-cost RF uplink (transmitter) modules for emerging ESOMPs applications in the Ka-band, without re-design iterations. This approach commences with the derivation of the system specifications, considering the application and international regulatory requirements. Based on these specifications, the transmitter/system architecture is derived, and the components of this transmitter, required to meet the system specifications are defined. Furthermore, a concept for low-cost realization of the transmitter module using the specified components, as well as a concept for testing this module are developed. For the implementation of the realization concept, models are developed and experimentally verified at the packaging and component levels. The verified models are applied to optimize the RF performance of the Ka-band transmitter components and modules.

The remaining sections of this paper are structured as follows: In section II, an overview of the M3-appraoch is presented and in section III, some aspects of this approach are illustrated.

The M3-approach initially proposed in [5], and extended in [6], is a holistic approach for efficient and accurate design of RF components, modules and systems without re-design iterations. It consists of three phases, namely the methodologies, models and measures phases. In this section, a very brief overview of the core aspects of these phases is given.

The goal of the methodologies phase is to derive a hardware realization concept, which meets the application and regulatory requirements, as well as concepts for testing the characteristics, performance, functionality and/or reliability of the component, module and/or system under consideration. To reach this goal, well-structured methodologies are developed and implemented in this phase. This includes methodologies for:

• Derivation of the system specifications

• Derivation the system architecture

• Specification of the system components

• Development of the hardware realization concept

• Development of test concept

The results of the methodologies phase, specifically, the results of the methodologies for hardware realization and test concepts, serve as the input of the modeling phase. For the implementation of the realization concept, robust models are developed and verified at four distinct levels, namely:

• Package-level

• Component-level

• Module-level

• System-level

The experimentally verified models developed at each of these levels is applied to rigorously study the effects of a multitude of parameters such as the design parameters, effects of the packaging technologies as well as the effects of process variations which occur during fabrication.

Based on the results of the extensive investigations performed in the previous phase, design measures, rules or guidelines are extracted. These measures are applied to design and test the packaging and system-integration platform (SiP), system-board, transceiver components, module and/or the entire system which meet the specifications defined in the methodologies phase, without re-design iterations. Applying these measures right at the beginning of the design process leads to the elimination of trial-and-error-based re-design iterations. Consequently, the development time and development are greatly reduced.

In this section, we illustrate how the methodologies and models phases of the M3-approach are applied for the design of Ka-band transmitter modules.

The methodology for deriving the system specifications consists of the following steps:

• Analysis of

  • regulations regarding frequency band and power limits,

  • transmission channel and

  • typical signal constellations.

• Definition of

  • antenna element spacing

  • total antenna size and gain as well as

  • maximum equivalent isotropic radiated power (EIRP max).

First of all, we select the bandwidth from 29.5 GHz to 30 GHz for the Ka-band transmission, since this frequency band is within the spectrum assigned by the European Telecommunications Standards Institute (ETSI) to Earth Stations on Mobile Platforms (ESOMP)[7]. This band is also available for satellite communication in other countries as stated in[8]. However, ETSI does not provide a maximum permissible EIRP at boresight but rather specifies maximum off-axis EIRP emission densities within the operating band. This is done to ensure that terminals transmitting towards satellites stay within the permissible interference levels of other systems in their proximity. In the regulation[7], the specification regarding the co-polarized radiation characteristics of the terminal gives an EIRP limit for a band of 40 kHz of

with the assumption that only one terminal is transmitting at a time. Hereby EIRP_limit is the EIRP power density limit and φ is any direction from the main beam axis of the antennas. These regulations hold for clear sky conditions. However, in case of ESOMPs with uplink power density control, the maximum EIRP density may be exceeded by the amount of additional attenuation that is expected due to fade conditions[7]. At Ka-band this can easily reach 12dB[9], which is the margin added for the calculation of the maximum power into the antenna P_max.

Since EIRP is dependent on the input power density to the antenna, Pd, Pd must first be calculated. According to[10], Pd is obtained using

where P is the per-carrier input power to the antenna, B is the bandwidth occupied by the signal, and PF is a signal peaking factor, which depends on the modulation that is used. To obtain the EIRP power density limit, the antenna gain at the specific angles off the main beam needs to be added to the above calculation for Pd. Therefore,

whereby G (φ) is the antenna gain at the angle φ. For an assumed occupied bandwidth of 6 MHz for the signal, and a signal peaking factor of 0 dB for QPSK modulation, the maximum power input to the antenna P_max to stay within regulations is calculated using

where the 12 dB is added as rain fade margin as explained above.

For a phased array, the maximum distance between antenna elements depends on the wavelength and the maximum look angle that needs to be achieved without generating grating lobes. According to[11], a look angle of 60° from boresight requires a maximum spacing of approximately 0.54 λ between elements, with λ being the wavelength of the signal in air. A spacing of is defined as the pitch between the antenna elements.

To ensure a high degree of miniaturization, and thus be competitive regarding the size of the antenna terminal with respect to current market solutions, a maximum diameter of smaller than 50 cm was specified for the phased array. With a square array of patch antennas having a pitch of 5mm between the elements, this yields a total number of 5000 elements. Using the next closest power of two yields an array size of 4096 elements with 64 elements to a side in a square array and a maximum diameter of about 45.3cm. The calculation of the maximum gain that is achievable with this constellation under consideration of the efficiency and element gain is presented in the next paragraph.

The maximum RF power that the antenna may radiate is limited mostly by the power density off boresight, where too high radiation levels could interfere with other radio systems. To determine the maximum antenna gain and side lobe levels, Keysight SystemVue is used to simulate the phased array front-end. Therefore, an antenna array with 4096 elements, an amplitude taper using a Taylor window with −30dB side lobe level and an array efficiency of 90% was simulated. The element gain was set to 4dBi. With this constellation a maximum gain of G_total = 39.6dBi is simulated at boresight. The maximum input power levels to the antenna for clear sky conditions P_maxcs and with rain fade margin P_maxrf at which the maximum permissible power densities are reached are given in Table 1.

The system specifications so far for the phased array antenna can thus be summarized as shown in Table 2 with the maximum EIRP being

The specifications defined in the previous section serve as input for derivation of the system architecture in this section. Since our focus is to a develop a scalable module, we must derive an architecture for a fundamental module which can be extended to yield an entire system which can address different power requirements. The methodology for deriving the system/transmitter architecture of the fundamental module consists of the following steps:

• Break-down the system specifications into the specifications of a fundamental module

• Definition of the beamforming technique

• Definition of transmitter architecture

The first step is to derive the transmitted power of the fundamental module from that of the total system. To reach this goal, we applied the following equation:

For 4096 elements this translates to P_element= −19.5dBW =10.5 dBm per element.

Therefore, considering the antenna gain of 4 dBi for each element, and the spacing of 5 mm, the specifications of the fundamental transmitter module are as given in Table 3.

After calculating the transmitted power, the next step is to define the beamforming technique. Analog beamforming approaches such as using a Blass matrix[12], Butler matrix [13] or Rotman lens [14] allow steering of a beam to a number of fixed positions depending on the number of input channels that are available. Digital beamforming and steering offers a lot of flexibility since the phased array's capability are only limited by the digital signal processing power. Yet, it has the drawback that each element that needs to be steered requires a complete signal chain from the RF domain to the digital domain separate from all other channels. For thousands of steerable elements, digital beamforming and steering poses a significant challenge regarding the integration density, number of components and processing power[15]. In this work, we considered analog beamsteering using discrete phase shifter components in the RF signal path, which is compared to digital beam forming in [15] for Satcom-on-the-move applications, as the beam steering solution. This approach allows a finer resolution in the beamsteering angles compared to Blass matrices or similar approaches, but has a dramatically reduced complexity compared to digital beamforming techniques.

In the next step, we define the transmitter architecture for the implementation of this chosen analogue beamforming. The requirement of using off-the-shelf components, for which monolithic microwave integrated circuits (MMICs) in these frequency ranges are often based on GaAs technology, presents multiple challenges regarding the integration density and cost. Since GaAs MMICs often present a single functionality such as amplification or mixing, multiple MMICs are required to implement a complete up conversion signal chain. To minimize the component count, the chosen architecture mixes the IF signal (2–2.5 GHz) to the RF frequency before distributing the signal to the different elements. The phase shifters thus need to be placed in the RF path after the signal has been distributed to all the elements. Figure 1 depicts the block diagram of the signal chain for the fundamental module. In addition to the phase control in the RF path, an amplitude control is also included. This enables amplitude tapers over the phased array to adjust side lobe levels of the radiation characteristics. As can be seen in figure 1, one RF signal chain drives two antenna elements. This decision was made to reach the required integration density that the element spacing demand. Therefore, MPA2 (medium power amplifier) in this circuit needs to have at least 3dB more output power to achieve the element power specified in Table 2. Furthermore, some additional margin in the signal power needs to be considered to compensate losses in the signal path from the PA to the antennas.

The intermediate frequency (IF) signal and the local oscillator (LO) signal are inputs to the module. Since these need to be connected to the module via some RF transition, the LO driver also includes a frequency multiplier. This way, the transition from the system board to the module can be done at a lower frequency. For the beamforming network an integrated network of Wilkinson power dividers is used.

The components of the transmitter architecture defined in the previous section are specified in this section. The methodology for this specification consists of the following steps:

• Market research to check for availability of off-the-shelf components

• Analysis of potential off-the-shelf components, considering power levels and electrical performance, availability, size, packaging, thermal behavior and cost.

• Definition of component specification

The module architecture shown in Figure 1 depicts both the active and the passive components that need to be integrated in the SiP. In the first step, an extensive market research was conducted to identify potential off-the-shelf components. Suitable components were selected based on power levels and electrical performance, availability, size, packaging, thermal behavior and cost. From this selection, different combinations of components that provide the required power levels along the signal chain, and can be integrated within the size constraints given by the antenna were investigated. To determine the required power levels that the components need to provide, some initial investigations regarding the losses in the signal path were conducted. For the connection between the antenna input and the second medium power amplifier (MPA2), a loss of 2dB was estimated. Thus, for a P1dB output power of 13.5dBm the MPA2 needs to deliver at least 15.5dBm. The selected component delivers a typical 16dBm P1dB at a gain of 18dB. To drive the MPA2 at P1dB, an input power of −2dBm is thus required. By combining different placement options with the component selection finally yielded the required functionality of architecture for the module. The component name and type of the off-the-shelf components is listed in Table 4.

One of the key aspects of the module realization concept is the development of the system-integration platform (SiP). Figure 2 shows the SiP that was developed for integration of the antenna and transciver components. This SiP was developed to achieve three main objectives, namely: (1) excellent RF properties, (2) excellent thermal properties, and (3) low cost. Therefore, the GaAs chips are placed into cavities in an RF laminate on top of a copper core to achieve excellent heat dissipation from the chip and shortenend wirebonds for RF interconnection. The electrical interconnects pass through optimized coaxial vias in the copper core, microstrip and stripline transmission lines, which include wilkinson power dividers, to passive structures and connectors on the bottom side of the module. From there, they can be connected to a separate baseband board. Heat will subsequently be conducted through polymer layers on the underside of the copper core with thermal vias to a heat sink, which can be further cooled with ventilation or liquid cooling.

In order to exploit inexpensive PCB technologies, a metal core PCB (MCPCB) can be used, but the design must utilize (1) a material with excellent high frequency characteristics, as well as compatibility with an embedded copper core, (2) a metallization that is compatible with the bonding process, and (3) a cavity structuring with tolerances that allow for the shortest possible wirebonds, the highest possible integration density, and still allows automatic placement.

Material - The die have a thickness of 100μm and the die attach material will have an estimated thickness of 40μm. Therefore, a laminate and its top side metallization should come as close to 140μm as possible. Ultimately, Megtron6^™ was selected. With two 60μm prepreqs and a 35μm thickness metallization on the top side, we achieve a very good thickness match of the PCB stack at approximately 156μm. Megtron6^™ also has a low dielectric loss tangent, a good processability, and is widely available. Because the material must also be compatible with laser cavity structuring, Teflon materials can be eliminated as an option.

Metallization - For the metallization of the PCB, electroless nickel electroless palladium immersion gold (ENEPIG) was chosen because, although the electroless nickel layer introduces additional high frequency losses, this metallization combination is suitable for gluing, silver sintering and gold wire bonding. High frequency PCB losses can be mitigated by bonding chip-to-chip and keeping transmission lines as short as possible.

Cavity Structuring - The goal of the cavity structuring is to keep the wirebonds as short as possible while still allowing automatic die placement inside the cavities. Laser technology was selected, as opposed to milling technology, due to its improved tolerances of +/−50μm. Ideally, the cavity would be structured as close to the front-end die as possible, to facilitate the shortest possible wirebonds for RF and power integrity reasons. Furthermore, the cavity should be as small as possible to achieve the highest possible integration density. The chips have a length tolerance of +/− 50μm. Since the MMICs had to be placed in a cavity, a gap of 100 μm around the chips was chosen to consider the production tolerance of the cavity, placement accuracy of the machine (Datacon 2200 evo) and to be sure that contact with the placement tool is avoided.

In the development of an RF module of this complexity the test concept is critical with regards to a successful development. When multiple components as illustrated in Figure 1 are integrated in a package without the possibility of performing in circuit testing, it is of paramount importance that the functionality of each part of the signal path be verified on its own before the complete module is put together. This way, the simulation models can be verified separately and the final package design is based on tested models. Therefore, a hierarchical test concept is followed.

As basis for the RF design, the dielectric material parameters need to be extracted in a first step. Therefore, planar resonators and transmission line structures are designed, built and tested. Based on the RF material parameters, more complex integrated components such as via transitions, filters and antennas can be designed. Besides these a selection of active components suitable for the design can be assembled in test structures to verify that the active components still work as intended when packaged in the chosen technology. This constitutes the second stage of testing. The third stage comprises multiple components in a chain using via transitions, transmission lines, passive components and active components. Complete signal chains and antenna arrays are also tested at this point. At the fourth stage of testing, the complete module needs to be tested with all components integrated in the package. The tested package can then be integrated in the system for the final system level testing.

In this section, present an overview of our modeling approach at the packaging level and the component level, as examples.

At the packaging level, we modelled, simulated, fabricated, measured and optimized a BGA interconnect as an example. Figure 3 shows a cross-sectional view BGA, used to interconnect the antennas substrate and the other parts of the SiP.

Ansys HFSS (High Frequency Structure Simulator) was used to perform the 3D full-wave electromagnetic simulation of the BGA interconnect. For this simulation, all the relevant geometrical and material properties, based on fabrication design rules, material datasheets and material characterization were used. Wave ports configured in the microstrip mode, which most accurately reflects the field distribution on both the GaAs chip and on the antenna module, were used for excitation of the structure. The geometric properties like pad and antipad sizes, transmission line widths, and ball separation distances, were optimized through parameter sweeps with these full-wave simulations.

To validate the modelling of the chip interconnect structure, it is necessary to develop test structures that correlate closely to the modelling results. Because it is not possible to measure a single transitions with a wafer prober, a double BGA transition was fabricated with GSG (Ground-Signal-Ground) probes pads on both sides. This means that the double transition must also be modelled in the same way that the single transition was modelled. Figure 4 shows 3D and side views of the model.

The fabricated structures were measured using a vector network analyzer. As can be seen in figure 5, very good correlation was obtained between measurement and simulation.

After the experimental verification, the BGA interconnect was optimized to achieve optimal signal transmission in the desired band with very little return loss. It was determined that BGA balls with 250μm diameter are sufficient for excellent signal transmission. Figure 6 shows optimized results of the BGA interconnect. As can be seen in the figure, the insertion loss in the desired band is below −0.4dB and return loss is smaller than −20 dB.

The example of the component level modeling presented in this work is the filter design. This design is based on the work presented in[16]. For this filter design, Megtron 6 was chosen as the substrate technology. Figure 6 shows a cross-sectional view of the layer stack. The filter was modelled and simulated using HFSS to operate in the frequency band from 29.5 GHz to 30 GHz.

Figure 7 shows the top view of the filter and the geometrical parameters optimized to meet the filter specifications. The values of the parameters are given in Table 5.

To verify the simulation results, the filter was fabricated and measured using a vector network analyzer. As can be seen in figure 7, a very good correlation was obtained between the measurement and simulation results. The filter also functions properly well in the desired frequency band. Details on the modeling, simulation, fabrication and measurement of this filter configuration under consideration of the impact of process variation can be found in[17].

The holistic design approach presented and illustrated in this work can be used to design miniaturized, scalable, high-performance and low-cost RF uplink (transmitter) modules for emerging ESOMPs applications in the Ka-band, without re-design iterations.

This work was sponsored in part by the German Aerospace Association (DLR) under Grant Number 50YB1521. The authors would like to thank the AVISAT project consortium members from IMST GmbH and HISATEC for constructive discussion and input.