A 3-D packaging approach such as die stacking is an attractive way to package greater functionality and performance into a smaller footprint, often at a reduced overall product cost. Achieving such 3-D integration can however place significant demands on the manufacturing process, often requiring substantial production expense to bond multiple die in a sequential manner. One alternative, potentially offering significant throughput, is the use of selective laser reflow to bond stacked die. This process produces a localized heating of the stacked die sufficient to produce soldered interconnects at the bonding interface but with very short exposure times that minimize the heating of other parts of the assembly and decrease the overall duration of the bonding process.

The use of a commercial infrared (IR) laser reflow instrument for the sequential attachment of thin die into a 3-D stack was considered. The bonding technology under study consists of an infrared laser coupled with a custom optics system that allows the laser beam to be shaped into a range of rectangular shapes and sizes. This allows for a single device or target area to be selectively heated and reflowed while other regions in the near vicinity are not. The target reflow area is exposed to a shaped laser beam for a combination of laser powers and exposure times according to the desired thermal profile. The top most materials absorb the IR energy of the incident laser and conduct that thermal energy down to the solder joints and into rest of the assembly. The rates of heat transfer realized depend significantly upon the sample geometry and material composition. Since this produces a highly accelerated reflow, typically 2–8 seconds, the entire process is highly transient in nature.

This paper reports on the investigation into the utility of a selective area laser reflow process to sequentially bond thin die into a multi-chip stack. Thin silicon die (~60μm thick) were bonded to a 150μm thick laminate substrate using a selected area laser reflow process. The die interconnects were formed through the soldering of SnAg capped copper pedestals under the local laser heat. First level die were placed onto copper pads on the laminate and then bonded using the laser process. Subsequent die (2nd level) were placed on and bonded to gold plated nickel pad sites on the top of the first level die. At each step of the process the quality of the solder interconnects was examined using optical and electron microscopy. A range of laser profiles were utilized with several different thermal parameters: peak temperatures ranging from 235–255°C, time above liquidus between 1–3 seconds, and a fixed cooling rate of 40°C/s. Control samples of stacked die were assembled using conventional manufacturing techniques to enable direct comparisons of the interconnects and die bonding characteristics.

One current trend within the electronics packaging industry is a shift towards miniaturization, higher package density, and more exotic materials. This progression has placed a significant demand upon a variety of current manufacturing techniques and process to still remain applicable. Future technologies are requiring greater control over the reflow process as well as placing a premium on achieving a high throughput. In order to meet these challenges, the possibility of using an infrared (IR) laser to reflow components instead of a conventional convection oven has been proposed.

The use of an infrared laser to reflow electronic devices and components is not a particularly novel concept. However, despite the concept being demonstrated and studied with CO2 lasers as far back as 1977, it has only received significant interest in the last decade [1] [2]. The recent interest in the technique appears to correlate with the trend of temperature sensitive packages, increased PCB package densities, as well as the rapid development of new, emerging technologies.

One area of potential application is the bonding of thin flip chip die. First developed by IBM in the 1960s, this interconnection technology has developed significantly and occupies a critical role in a variety of technologies. The most common method of attachment is a mass convection reflow process, which allows for relatively high throughputs and the self-alignment of the solder joints [3] [4]. However, as flip chip packages continue the trend of being made thinner and thinner, excessive warpage problems have been noted to occur. Convection mass reflow allows for the silicon die and organic substrate to be heated equally creating a warpage within the assembly due to the dissimilar materials. This has the potential for electrical opens/shorts or potential die damage. Additionally, due to the convection air currents within the oven, there is a risk of the assembly not heating uniformly, resulting in an even greater risk for warpage and damage. This issue is expected to only increase as the package and/or substrate thickness continues to decrease.

Thermal compression bonding (TCB) is a potential alternative assembly process that could mitigate this issue. TCB processes using non-conductive adhesives have shown improved mechanical and thermal performance; however, the throughput of such techniques is quite low. This throughput issue would only be exacerbated when dealing with applications requiring “stacks” of thin flip chips bonded on top of each other.

Perhaps unsurprisingly, it is these challenges and drawbacks that are providing the motivation to develop next generation interconnect bonding techniques [5] [6]. Laser reflow processes present an attractive alternative assembly process for several reasons: the ability to locally heat a package or area without exposing the rest of the sample to elevated temperatures, highly accelerated reflow times, precisely controllable wavelength, and highly controllable directionality. Typically employed in annealing, cutting, drilling, or marking processes, laser technology affords the user incredible accuracy. Until recently, the inability to uniformly apply the laser beam to a specific area (due to the Gaussian energy intensity distribution across the laser beam spot) presented a debilitating challenge for the process, not to mention the significant costs associated with it [1] [7]. However, in the past decade the laser industry has matured significantly and beam shaping optics and technologies have emerged [8] [9]. It is this critical development that has allowed laser bonding techniques to be considered truly viable in a production setting for the first time.

The literature shows that there are only a handful of research efforts seeking to understand the laser reflow process and the inherent impacts upon solder joint microstructure and joint/package reliability. Previous work by the authors, as well as others, shows that the laser reflow process results in high heating rates (20°C/s - 80°C/s), short time above liquidus (TAL), and high cooling rates (~40°C/s) [10] [11] [12]. These uncommon reflow parameters resulted in measurable differences with respect to the microstructure of SnAgCu solder joints. Investigations revealed thinner, yet continuous, intermetallic compound (IMC) layers as well as a finer, more numerous Ag3Sn precipitate morphology. Despite these subtle differences, joint level mechanical shear and cyclic shear fatigue testing for SAC 305 samples showed that even for the most aggressive laser reflow profiles (e.x. Heating Rate: 80°C/s, TAL ~1.0s, Cooling Rate: 40°C/s) the performance was comparable to those reflowed using a conventional convection oven [10] [11].

The present effort studied the potential application of a laser reflow process for the bonding of thin die to a thin substrate. Additionally, the potential for bonding a “stack” of die was investigated. Moreover, thermal behaviors during reflow, package warpage, and interconnect quality and microstructure were examined and quantified.

Thin flip chips were assembled using a laser reflow technique and compared with conventionally (mass convection reflow) assembled counterparts. The flip chips were 6.5 mm × 11.1 mm × 0.056 mm. The substrate was a 0.160 mm thick organic coreless FR4 with 40 μm diameter pads with a ENEPIG finish. The flip chip interconnects were 30 μm tall Cu pillars with a 20 μm thick SnAg solder cap. The interconnect pitch was 79 microns.

As these die were designed to be stacked vertically, there were two different sets of die, possessing different bump patterns. The bottom level die had a single row of active bumps directly down the center with a scattering of other non-active bumps about the perimeter for mechanical support. The second die possessed a more typical full array of bumps. During placement, each die was dipped in a 1 mil thick film of TF-6507 flux. This flux was developed by Indium Corp. specifically for laser reflow processes with high heating rates and short TAL. Previous testing by the authors has shown that this laser optimized flux results in significant improvements in wetting while minimizing solder splatter and voiding.

The laser reflow tool used consisted of a 1 kW infrared (IR) laser with a 980 nm wavelength. This laser was routed through an optics system which acted to “shape” the beam into a rectangular shape of uniform intensity, see Fig. 1. For all of the samples the laser beam spot dimensions were locked at 8.0 mm × 13.0 mm. This generous tolerance ensured that the entire chip was being uniformly exposed to the laser beam.

Fig. 1:

IR image showing the uniformity of the beam area after use of the optical shaper.

Fig. 1:

IR image showing the uniformity of the beam area after use of the optical shaper.

Close modal

All of the samples were reflowed using similar profile parameters. Attempts were made to keep reflow times short, as would be asked in a production setting. Prior set up work identified the window for reasonable values which allowed for the construction of the reflow profiles used in this study. The time above liquidus was varied minimally while the peak temperature was ranged from 230°C to 260°C. The cooling rate was not varied, being kept locked at approximately 40°C/s. Five die were reflowed, characterized by X-ray and shadow moire, and then cross-sectioned for interconnect analysis.

Using the knowledge gained with the bonding of a single die, attempts were made to bond two-high stacks of die using two different approaches. Two different approaches were studied: a) bonding each die in the stack sequentially, and b) bonding both die in one single exposure. The same laser reflow profile was used for all bonding attempts in this part of the study.

Optical microscopy, bright field and cross polarized, on all samples was performed using a Zeiss M1m Optical Microscope. Samples examined via scanning electron microscopy (SEM) were coated with 10 nm of carbon in a Gatan 682 PEC Ion Etcher and Coater. Electron microscopy images were taken using a Zeiss FE-SEM SUPRA-55 VP system. Die warpage was measured using an Akrometrixs AKM600P shadow moire system.

Control samples were provided by the die manufacturer which had been assembled using a conventional mass reflow process. These samples were characterized via shadow moire to measure the warpage. Additionally, several samples were cross sectioned and analyzed using both optical and electron microscopy techniques.

A. 1-High Die Stack

The first objective of this study was to identify if an appropriate process exists that can effectively bond thin flip chips to a thin substrate. Die were attached using one of five different reflow profiles, see Table 1, after which the warpage in each assembly was characterized via side view cameras and shadow moire. The control samples provided by the die manufacturer possessed a coplanarity of 30–35 microns. Visual inspection of laser reflowed samples using a side view camera identified several that clearly were not lying flat or possessed some type of warpage. It appears that for the samples with the peak temperature above 250°C and with the lower cooling rate (A-1 and A-3, respectively) some significant warpage or coplanarity was present, see Fig. 2 and Fig. 3.

Table 1:

Outline of the different experimental samples with reflow parameters.

Outline of the different experimental samples with reflow parameters.
Outline of the different experimental samples with reflow parameters.
Fig. 2:

Side view images of thin flip chip samples reflowed with A) a peak temperature of 260°C (A-1) and B) with a lower heating rate, ~40°C/s (A-3).

Fig. 2:

Side view images of thin flip chip samples reflowed with A) a peak temperature of 260°C (A-1) and B) with a lower heating rate, ~40°C/s (A-3).

Close modal
Fig. 3:

Shadow-moire results of A-1 which had a peak temperature of 260°C, note the coplanarity of 40 microns.

Fig. 3:

Shadow-moire results of A-1 which had a peak temperature of 260°C, note the coplanarity of 40 microns.

Close modal

Cross sections of both die (A-1 and A-3) showed incomplete bonding of the solder interconnects. As Fig. 4 shows, some joints have bonded while other areas of the sample show excessive gaps and a lack of solder on the substrate pads. In addition, some pads clearly show the presence of solder which indicates that at some point during the reflow process the die was flat enough for some liquid solder to wet to the substrate pads. However, after that the die lifted enough to prevent the interconnect from forming. It is premature to make definitive statements on the cause of this; however, several likely possibilities exist. The die and/or substrate could have experience some type of warpage during the reflow; though, the substrate was fixed in a vacuum pallet for the process so the substrate warping or lifting is unlikely. Another possibility is simply the presence of an excess of flux. The manufacturer recommended dipping in a 0.5 to 1 mil flux plate; however, if there was a bit of excess flux at some point, the resulting fumes could serve to lift the die during reflow. Clearly, more work must be done to understand the role of the flux in the laser reflow process and the sensitivity to different flux amounts.

Fig. 4:

Cross section of the A-1 thin flip chip that displayed 40 microns of warpage.

Fig. 4:

Cross section of the A-1 thin flip chip that displayed 40 microns of warpage.

Close modal

The samples reflowed with peak temperatures between 230°C and 250°C and a heating rate of 80°C/s showed no discernable warpage in the side view camera. Shadow moire analyses showed that the coplanarity varied between 24 and 29 microns, see Fig. 5 for all three samples measured (A-2, A-3, and A-5).

Fig. 5:

Shadow moire 3-D plot showing the planarity of the sample with a peak temperature of 245°C (A-2).

Fig. 5:

Shadow moire 3-D plot showing the planarity of the sample with a peak temperature of 245°C (A-2).

Close modal

Cross sections of these die showed fully bonded interconnects with no opens or bridging, see Fig. 6. The solder joint standoff height was measured, comparing joints in the center with those in the perimeter. Solder joints located in the direct center of the package possessed an average height (pad to pad) of 12 microns while joints on the extreme edges had an average height of 8 microns. This does not agree with the moire measurements showing a coplanarity of 24 microns. It is important to remember that the substrate for these samples is ~150 microns thick and quiet easily bent and flexed. For this reason, a vacuum pallet was used to hold the substrate flat during reflow. What this disparity in joint height and warpage measurements indicates, however, is that the substrate is flexible enough to accommodate the inherent warpage of the die without damaging the solder interconnects. If the substrate is held flat during reflow, then the flip chip can be bonded with very little coplanarity.

Fig. 6:

Optical images of the cross sections of a sample with minimal warpage, A-2. Image are from A) the extreme right side of the die, and B) the direct center.

Fig. 6:

Optical images of the cross sections of a sample with minimal warpage, A-2. Image are from A) the extreme right side of the die, and B) the direct center.

Close modal

One explanation for the decreased coplanarity that is being observed with the laser reflow samples is due to the high degree of uniformity with which the die is being heated. Additionally, due to the accelerated reflow time the sample spends significantly less time at elevated temperatures, as compared to more conventional assembly techniques. This would also help to minimize the warpage taking place.

B. 2-High Die Stack

With viable laser reflow profiles identified that could successfully bond the flip chips, the next step taken was to identify possible processes that would result in successful chip stacking and bonding using the laser process. As mentioned previously, two distinct bonding processes were compared here. Process 1 involved a die being placed on the substrate, laser exposure and reflow, a second die being placed upon the first, and a second laser exposure and reflow (2-step process, samples A-6, A-7, and A-8). The second process involved placing both die and reflowing them both at the same time using a single laser exposure (1-step process, samples A-9 and A-10).

Of the three attempts made at bonding using the 2-step process, only one of the three samples did not have any visible warpage or lifting, see Fig. 7. Two different assemblies were bonded using the 1-step process and neither showed any visible warpage or lifting.

Fig. 7:

Side view images showing two different die stacks that were assembled using the 2-step process. Image A is showing a flat stack with no visible warpage (A-8) while image B shows a stack that has clearly lifted at one end (A-7).

Fig. 7:

Side view images showing two different die stacks that were assembled using the 2-step process. Image A is showing a flat stack with no visible warpage (A-8) while image B shows a stack that has clearly lifted at one end (A-7).

Close modal

Shadow moire analyses of the 2-step stack without visible lifting showed a coplanarity of 23 microns, quite similar to the measurements from the successful1-high stacks.

The one-step (Process 2) samples both did not show any visible warpage and had a coplanarity of 11 and 15 microns.

Fig. 8:

Shadow Moire results showing a coplanarity of 15 microns for a 2-high die stack (A-10) reflowed using the 1-step process.

Fig. 8:

Shadow Moire results showing a coplanarity of 15 microns for a 2-high die stack (A-10) reflowed using the 1-step process.

Close modal

Due to the different bump patterns on the two die, the samples were first cross sectioned into the first row of the top die. This means we were observing a perimeter row down the long side of the die. As the images show, for both of the samples bonded using the 1-step process all of the interconnects had cleanly bonded. Conventional microstructures were observed with clear intermetallic layers and precipitate structures, see Fig. 9 and Fig. 10.

Fig. 9:

BSE SEM image of a sample assembled using the 1-step process, A-10. The interconnects are leftmost joints in the exterior row on the top die.

Fig. 9:

BSE SEM image of a sample assembled using the 1-step process, A-10. The interconnects are leftmost joints in the exterior row on the top die.

Close modal
Fig. 10:

BSE SEM high magnification image of an interconnect from a 2-high die stack, A-10.

Fig. 10:

BSE SEM high magnification image of an interconnect from a 2-high die stack, A-10.

Close modal

Having observed the success with the bonding of the top die to the bottom die, the samples were then cross-sectioned into the center of the bottom die (which possessed the single row of active bumps down its center).

As shown in Fig. 11, some bumps in the center row had bonded cleanly; however, moving towards the edges the bumps had not bonded. Again, the presence of solder on some of the pads indicates that at some point during the reflow process, while the solder was liquid, it had lain flat enough for some solder to wet.

Fig. 11:

Optical image of the center row of bumps of the 1st level die in a 2-high stack. This sample was reflowed using the 1-step laser exposure process (Sample A-10).

Fig. 11:

Optical image of the center row of bumps of the 1st level die in a 2-high stack. This sample was reflowed using the 1-step laser exposure process (Sample A-10).

Close modal

This study examined the viability of using a laser reflow bonding process to assemble thin memory flip chips. A range of reflow parameters were examined and the resulting warpage and interconnect quality assessed. Additionally, the potential to use laser bonding technology to assemble stacks of memory die was studied.

Results showed that there exists a range of reflow parameters for which this laser bonding process can successfully bond a 56 μm flip chip with minimal die warpage. Several trials of the 1-High stack were successful in showing a 100% bonding of all interconnects. Additionally, given a flexible enough substrate, it appears any residual warpage in the die after reflow can be accommodated by the substrate with no damage to the interconnects.

The same reflow profile parameters were then used to bond 2-high stacks of die. Bonding the two die sequentially was only marginally successful with two of the three samples possessing clearly unacceptable warpage. Bonding two die with a single laser exposure appeared to be more successful. Warpage measurements showed a coplanarity of less than 20 microns for both samples. SEM analyses of the interconnects formed between the bottom and top die showed well formed, uniform joints with a conventional Sn solder microstructure and morphology. Interestingly, only partial bonding had occurred between the bottom die and the substrate. The interconnects directly under the center of the die had bonded while the perimeter had not.

While this study has demonstrated that the laser reflow process may be an attractive candidate for flip chip bonding, more work remains studying the various process windows and how they will impact the interconnect quality, bonding process, and reliability.

The authors gratefully acknowledge funding of this study by the Universal Instruments AREA Consortium and the support of its many industry sponsors.

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