Electrical Performance and Robustness of Ultrathin High-Density Carbon Nanofiber Capacitors on Silicon, Alumina and Glass Substrate Materials

Given the on-going trend of making electronic devices smaller, more powerful and with more functionality, as well as innovations in automotive, IoT and other applications such as the upcoming 5G standard, there is also a need for high-performing and small capacitors, both in terms of footprint area and profile height. These capacitors fulfill a multitude of functions in high-performance electronics, such as power delivery, decoupling and noise suppression [1].

Traditionally, this has been addressed by further development of existing technologies such as multi-layer ceramic capacitors (MLCCs) and Si trench capacitors that provide high capacitance per surface area while keeping the equivalent series resistance (ESR) and equivalent series inductance (ESL) low at a high breakdown voltage and low leakage currents [2], [3]. However, these technologies are inherently limited due to their larger profile height which limits their use in increasingly miniaturized applications. Thus, as miniaturization and integration are further developed, new concepts based on new materials and technologies will likely emerge.

Historically, nano particles and carbon nanotubes (CNTs) have been utilized to create large 3D surface areas to realize MIM capacitors, but have had the drawbacks of being either physically large and electrically unsatisfactory due to poor contact between the CNTs and electrode materials [4], or requiring high process temperatures or additional transfer processes [5].

This paper presents a solution to these issues in the form of fully solid state (CNF-MIM) capacitors using carbon nanofibers to increase the 3D surface area grown in a CMOS compatible process allowing for a high capacitance per footprint area, while keeping the overall profile height of the components at a few microns. The electrical performance in terms of capacitance density, ESR, ESL and DC characteristics, as well as the effects of voltage and thermal stress are investigated on devices fabricated on a variety of substrate materials. In this paper, high-resistivity Silicon (HR Si), Silicon on insulator (SOI), glass and alumina substrates are investigated and the feasibility of using a wide range of substrate materials is shown.

Although manufactured on different substrates, the fabrication of the CNF-MIMs follow the same basic procedure. The capacitors are manufactured and designed as both standalone devices and test structures featuring both 1-port and 2-port shunt layouts for accurate characterization of their DC and RF performance. The bottom electrode consists of a Ti/Cu metal stack, onto which a catalyst is patterned and evaporated. Vertically aligned CNFs are grown from the catalyst as seen in Figure 1a. For a more in-depth description of the growth process using plasma enhanced chemical vapor deposition, refer to [6]. The CNFs are then coated in a conformal layer of dielectric and a thin TiN layer using atomic layer deposition (ALD), as seen in Figure 1b. The devices are then finished by sputtering the bulk top electrode material, in this case Ti/Al. This process is further described in [7], [8]. Figure 2 provides an illustrative cross section of the CNF-MIM, and Figures 1c and 1d show a stand-alone CNF-MIM and a finished 2-port device in a co-planar waveguide (CPW) shunt configuration, respectively.

The fiber length of respective devices is determined post-growth by using scanning electron microscopy (SEM) at viewing angles close to 90° and is specified in Table 1, along with the specifics of the field oxide configuration of each device.

The devices under test were characterized using a 2-port S-parameter measurement from 10 Hz to 3 GHz on a Keysight E5061B VNA together with a Cascade probe station equipped with a thermal chuck, using standard SOLT calibration procedures. Using standard de-embedding techniques, this measurement setup allows for accurate extraction of the device capacitance at frequencies far below the self-resonance frequency (SRF), while also removing the contributions from parasitic elements in the measurement structures [9]. Moreover, the impedance characteristics of the device can be directly derived from the S-parameter matrix, from which both ESR and ESL can be determined. This setup also allows for the measurement of device parameters in the presence of a voltage bias. The capacitors were also subjected to a temperature ramp from room temperature to 150°C in 25° increments to determine capacitance as a function of temperature. The 2-port measurement setup on the thermal chuck is shown in Figure 3.

Additionally, the DC characteristics of the CNF-MIMs have been measured on-chip using a Keithley 4200SCS parameter analyzer which provides leakage current and breakdown voltage information of the devices.

The capacitance density versus frequency for the devices manufactured on Si, SOI and alumina substrates is shown in Figure 4. For these devices, a capacitance density of 380 nF/mm², 350 nF/mm² and 450 nF/mm² respectively is shown. A capacitance density of 250 nF/mm² was found using a HP8285A LCR meter for the CNF-MIM fabricated on a glass substrate. The difference observed in capacitance density between the CNF-MIM fabricated on SOI and glass can be attributed to the differences in the effective dielectric constant of the oxide stacks used, whereas the difference between HR Si and SOI can be explained by the difference in CNF length. The difference between CNF-MIMs manufactured on glass and alumina, despite having the same configuration of field oxide material can most likely be attributed to differences in the CNF properties themselves. Moreover, the capacitance density as a function of frequency exhibits a relatively flat behavior across a wide frequency band, making these devices suitable for a wide range of applications.

The complex impedance of the capacitors is measured from 10 Hz to 3 GHz using a two port shunt structure as seen in Figures 1d and 2. In particular, a 60 nF (2 × 210 mm × 410 mm) device using this setup was investigated. As seen in Figure 5, an ESR less than 100 mΩ is achieved. This value places the CNF-MIM capacitor within the useful range for efficient filtering and decoupling. Moreover, it is believed that this value can be further lowered by improving the quality of the electrode materials.

The inductance of the capacitor is extracted from the complex impedance measured above the SRF, and although the value depends largely on the geometry of the test structure, values in the range 5–15 pH are achieved for this type of device.

The capacitance behavior under an applied bias voltage was extracted from the same 2-port shunt configuration as before, once for each bias voltage starting at 0 V with a step of 1.5 V. The result is shown in Figure 6. The CNF-MIM manufactured on SOI shows a similar voltage dependence compared to devices fabricated on HR bulk silicon [10], with a capacitance density dependence of about 1 %/V. The CNF-MIMs manufactured on glass and alumina substrates exhibit a pronounced difference in capacitance density behavior as a function of applied bias, despite being manufactured using the same dielectric stack (0.5 %/V and 4 %/V for glass and alumina respectively). This correlates with the observations made regarding the difference in absolute capacitance density, suggesting that the CNF properties causes this difference in bias behavior.

The capacitance density as a function of temperature was extracted using the same 2-port shunt configuration where the thermal chuck was heated from room temperature up to 150°C in increments of 25°. Both the Si and alumina devices exhibit a similar behavior in terms of capacitance density as a function of temperature. In both cases, an increase of less than 10 % in capacitance over the entire temperature range as seen in Figure 7.

The ratio between leakage current to specific capacitance is plotted as a function of applied bias voltage for a typical CNF-MIM as shown in Figure 8.

Most of the devices manufactured show a specific leakage current on the order of 0.01 nA/nF at 1 V. This makes them suitable for use in digital circuits operating around and below 1V. Additionally, this can be tuned for many specific applications. Based on previous investigations, the oxide configurations used for these devices is expected to be around 6 V [11]. Insulation resistances for SOI, glass and alumina at 1 V was found to be 60 GΩ, 390 GΩ and 1 GΩ, respectively. This further indicates that the CNFs grown on alumina exhibit different properties to the ones grown on glass, as they use the same field oxide configuration.

We have demonstrated the performance of solid-state CNFMIM capacitors, that can be manufactured in a fully CMOS compatible process. The performance of the manufactured devices has been shown to depend more on CNF and oxide properties rather than the underlying substrate material. This enables the possibility of fine-tuning the process parameters to achieve the desired characteristics. It also implies that the process is compatible with a wide range of possible substrates and can be implemented as both integrated and discrete components, making them a promising alternative for the demanding applications of future electronics. Capacitance densities in excess of 300 nF/mm² have been achieved at a total profile height of just 5 μm, while keeping the ESR and ESL below 100 mΩ and 15 pH, respectively, demonstrating the suitability of CNFMIM capacitors in high frequency applications. The stability of the devices under voltage and thermal stress has also been investigated, finding the capacitance change to be less than 10% for voltages below breakdown voltage and temperatures up to 150°C, respectively, making the devices suitable for a wide range of demanding operating conditions.