To drive light-emitting diodes (LEDs) at high power, the construction of the LED has to be thermally efficient to ensure good optical and reliability performance. A shorter design cycle can be achieved through a fast and accurate modeling prior to prototyping. In this paper, a surface mount (SMT) LED was modeled using a commercial computational fluid dynamics code. The simulation was done based on Joint Electron Device Engineering Council's (JEDEC's) thermal resistance measurement set-up and the model was validated using actual samples. Thermal resistance between junction to pin and between junction to ambient of LED packages were measured using a thermal resistance tester in compliance with the Electronic Industries Association/JEDEC Standard (EIA/JESD) measurement method. A series of sensitivity analyses were done based on the validated simulation and considering key design features. Effect of die-attach material at different bond line thicknesses (BLT) and adding heat spreaders having different sizes were analyzed. Applying a combination of key sensitivity analyses results, the junction to pin thermal resistance of the redesigned LED was reduced by 42%.
Thermal Design Optimization of Optoelectronic Package
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N. Aizar A. Karim, P.A. Aswatha Narayana, K.N. Seetharamu; Thermal Design Optimization of Optoelectronic Package. Journal of Microelectronics and Electronic Packaging 1 October 2005; 2 (4): 232–239. doi: https://doi.org/10.4071/1551-4897-2.4.232
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