Electrical and mechanical performance of quilt packaging (QP), a 2D system-in-package chip-to-chip interconnection, is presented. QP employs contacts at the edges of integrated circuit dice along their vertical surfaces. Based on 3D HFSS simulations, the self-inductance of QP can be less than 100 pH, and the self-capacitance can be less than 34 fF due to the shortness of the interconnection path. QP interconnection using solder paste with pin transfer is presented, and mechanical reliability is evaluated. A new pull test system specifically designed for QP is presented. The pull force that causes failure in a set of edge interconnects totaling 3 mm width of nodules is about 658 g-force for Sn63Pb37 and 953 g-force for SAC305.

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Author notes

Department of Electrical Engineering, University of Notre Dame, Notre Dame, Indiana, 46556