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Hsing-Ning Liu
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Journal Articles

Heterogeneous Integration on 2.3D Hybrid Substrate Using Solder Joint and Underfill

Open Access
Ricky Tsun-Sheng Chou, John H. Lau, Gary Chang-Fu Chen, Jones Yu-Cheng Huang, Channing Cheng-Lin Yang ...
Journal: Journal of Microelectronics and Electronic Packaging
Journal of Microelectronics and Electronic Packaging (2022) 19 (1): 8–17.
https://doi.org/10.4071/imaps.1546248
Published: 07 April 2022
View articletitled, Heterogeneous Integration on 2.3D Hybrid Substrate Using Solder Joint and Underfill
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Journal Articles

Thermal Cycling Test and Simulation of Fan-Out Chip-Last Panel-Level Packaging for Heterogeneous Integration

Open Access
John H Lau, Cheng-Ta Ko, Chia-Yu Peng, Kai-Ming Yang, Tim Xia ...
Journal: Journal of Microelectronics and Electronic Packaging
Journal of Microelectronics and Electronic Packaging (2021) 18 (2): 29–39.
https://doi.org/10.4071/imaps.1419800
Published: 16 July 2021
View articletitled, Thermal Cycling Test and Simulation of Fan-Out Chip-Last Panel-Level Packaging for Heterogeneous Integration
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Journal Articles

Thermal Cycling Test and Simulation of Six-Side Molded Panel-Level Chip-Scale Packages (PLCSPs)

Open Access
John H Lau, Cheng-Ta Ko, Chia-Yu Peng, Tzvy-Jang Tseng, Kai-Ming Yang ...
Journal: Journal of Microelectronics and Electronic Packaging
Journal of Microelectronics and Electronic Packaging (2021) 18 (2): 67–80.
https://doi.org/10.4071/imaps.1421341
Published: 16 July 2021
View articletitled, Thermal Cycling Test and Simulation of Six-Side Molded Panel-Level Chip-Scale Packages (PLCSPs)
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Journal Articles

Six-Side Molded Panel-Level Chip-Scale Package with Multiple Diced Wafers

Open Access
John H. Lau, Cheng-Ta Ko, Tzvy-Jang Tseng, Chia-Yu Peng, Kai-Ming Yang ...
Journal: Journal of Microelectronics and Electronic Packaging
Journal of Microelectronics and Electronic Packaging (2020) 17 (4): 111–120.
https://doi.org/10.4071/imaps.1226533
Published: 15 December 2020
View articletitled, Six-Side Molded Panel-Level Chip-Scale Package with Multiple Diced Wafers
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